Deploying HLS into a DO-254/ED-80 workflow

To remain competitive in a challenging market, avionics companies continue to innovate across all aircraft-related…

Siemens EDA launches new Veloce hardware-assisted verification system

Siemens Digital Industries Software today unveiled its next-generation Veloceā„¢ hardware-assisted verification system for the rapid verification of highly sophisticated, next-generation integrated circuit (IC) designs. This is the first complete, integrated offering that combines best-in-class virtual platform, hardware emulation, and Field Programmable Gate Array (FPGA) prototyping technologies and paves the way to leverage the latest powerful hardware-assisted verification methodologies….

TinyALU and its BFMs

Cocotb Bus Functional Models

In this series we’re talking about using Python as the testbench software in this testbench…

Getting Started with Questa Memory Verification IP

By Chris Spear & Kamlesh Mulchandani  Introduction The best way to create a System on…

Proxy-Testbench

Introduction to Coroutines

In the first post of this series on Python verification we discussed the proxy-driven testbench…

Now Available: Verification Horizons - March 2021

DVConUS Issue of Verification Horizons is Now Available

I’m pleased to announce that our March, 2021 issue of Verification Horizons is now available,…

Finding FUN – DPI-C Recording C Variables in a Wave Database

Pandemic? Cold freeze? No Power? Ugh. What a 12 months. And all that’s unfolded. I’m…

Getting Started with Questa Verification IP for Protocols

The best way to create a System on a Chip is with design IP: blocks…

Epilogue: The 2020 Wilson Research Group Functional Verification Study

This is the last in a sequence of blogs that presents the findings from our…