Calibre - Semiconductor Packaging

User2User 2024: Meeting future performance demands through packaging: ChipletZ

September 27, 2024

Learn how 3DIC tech enhances compact, high-performance systems but faces verification challenges. We explore solutions and methodologies, including the use of Siemens XSI and Calibre 3DSTACK.

By John McMillan

4 MIN READ

User2User 2024: Silicon photonics to integrate chiplets: Swissbit

September 17, 2024

Swissbit is pioneering chiplet and system-on-package solutions that embed security and functional safety from the design phase to meet stringent requirements in harsh industrial and automotive environments.

By John McMillan

3 MIN READ

User2User 2024: Chiplets for future automotive application: Fraunhofer

September 11, 2024

Andy Heinig, Head of Department Efficient Electronics at Fraunhofer, explains why automotive is especially a good market and enabler for chiplets and presents different use cases for chiplets that are on the horizon.

By John McMillan

3 MIN READ

User2User 2024: EMIB based advanced packaging flow – Intel Foundry

August 12, 2024

Learn how Intel uses 3DIC verification to leverage Siemens XSI & Calibre 3DSTACK for DRC, LVS, assembly checks. Explore methodologies for high-performance systems.

By John McMillan

3 MIN READ

Why is a comprehensive workflow essential for chiplet design and today’s 3D IC architectures?

August 8, 2024

Explore this infographic to learn why a comprehensive workflow essential for chiplet design and today’s 3D IC architectures.

By John McMillan

2 MIN READ

The multi-physics challenge: Known good die may not behave in 3D IC as stand alone!

August 5, 2024

Discover how Siemens’ EDA tackles the multi-physics challenge to achieve fast, accurate assembly-level physical verification.

By John McMillan

2 MIN READ

Discover how AI is changing the nature of semiconductor design

July 16, 2024

AI is shaping the semiconductor industry’s future and its alignment with Siemens’ commitment to innovation and enhancing sustainability by accelerating…

By John McMillan

2 MIN READ

Assembly Verification Flow for Silicon Interposers with Embedded Deep Trench Capacitance

User2User 2024: Assembly verification flow for silicon interposers

July 15, 2024

In this User2User 2024 session Broadcom’s Suvarna Vikhankar presents “Assembly Verification Flow for Silicon Interposers with Embedded Deep Trench Capacitance”

By John McMillan

2 MIN READ

User2User 2024: Advanced physical verification flows for 3D IC’s

June 25, 2024

In this User2User 2024 video presentation, now available on-demand, Microsoft’s Amit Kumar discusses 3D IC verification flows with a focus…

By John McMillan

3 MIN READ