Siemens EDA Blogs

Siemens EDA’s mission is to help you engineer a smarter future faster. Read our latest blog posts to keep up to date on the latest tools, trends, methodologies and offerings in IC, advanced packaging and PCB systems electronics design, verification and manufacturing.

Tessent Solutions

Tessent Wraps Up Summer Webinar Series

October 06, 2020

The summer of 2020 featured several new webinars from the Tessent Test Solutions group at Mentor, a Siemens business. These...

By Tessent Solutions

Electronic Systems Design

How to Take Control and Reduce PCB Design Tweaking

September 30, 2020

In the realm of PCB fabrication, it is commonplace for manufacturers to “tweak” board designs provided by designers in order...

By Alex Belelovsky

HLS Design & Verification Blog

SemiEngineering: Custom Designs, Custom Problems

September 16, 2020

Excerpt from article: “Custom Designs, Custom Problems“ You have to put margin in your architecture. You have to leave a...

By nileshthiagarajan

Tessent Solutions

Video: ITC India 2020 keynote—Test community can take on silicon lifecycle challenges

September 15, 2020

The role of test is expanding from its traditional role into one that includes managing the entire silicon lifecycle. To...

By Tessent Solutions

Calibre IC Design & Manufacturing

SAMP series finishes with SAMP cut mask decomposition techniques

September 09, 2020

By David Abercrombie and Rehab Kotb Ali – Mentor, A Siemens Business We’ve been writing about self-aligned multi-patterning (SAMP) topics...

By Calibre IC Design & Manufacturing

HLS Design & Verification Blog

SemiEngineering: The Evolution Of High-Level Synthesis

August 27, 2020

Excerpt from article: “The Evolution Of High-Level Synthesis“ The first panelist was Brian Bowyer, director of engineering for Siemens EDA. Bowyer...

By nileshthiagarajan

Electronic Systems Design

Right the first time

August 27, 2020

Shift left – Shift Right (1st part out of two) In 1887 the great city of Chicago in response to...

HLS Design & Verification Blog

SemiEngineering: Power And Performance Optimization At 7/5/3nm

August 13, 2020

Excerpt from article: “Power And Performance Optimization At 7/5/3nm“ At the edge, where people are building these new AI processors,...

By nileshthiagarajan

Tessent Solutions

Using critical area to optimize test patterns

August 13, 2020

In a new technical paper, Ron Press, the director of technology enablement for the Tessent Test Solutions, describes the new...

By Tessent Solutions