By Elven Huang – Mentor, A Siemens Business
SRAM debugging at advanced nodes is challenging. With pattern matching and similarity checking, Calibre tools enable designers to more quickly and precisely locate SRAM modification errors and determine the correct fix.
Static random-access memory (SRAM) is found in virtually every electronic product, from the simplest talking toy to complex automotive and industrial systems. SRAM blocks are typically used for operations that require high-speed access to frequently-used data. SRAM is also a critical element of system-on-chip (SoC) designs, especially at advanced nodes.
Because SRAM blocks are large, their quality has a significant impact on yield. Most SoC design companies use proven SRAM blocks from the foundries as intellectual property (IP), rather than creating their own SRAM designs. However, SoC designers almost always end up adding some customization to the SRAM blocks they incorporate into their designs. These adjustments can create potential defects and impact yield. The challenge for advanced node SoC designers is to find the balance between their need for SRAM customization to improve SoC performance, and the potential impact of those changes on yield.
But that’s all taken care of in design rule checking (DRC), right? Well, the structure of a SRAM block is complicated, not only because it involves multiple layers and multiple cells, but also because it requires all cells to be placed in a specific configuration. Additionally, there are usually multiple types of SRAM blocks used in a SOC, with different cells or configurations. In general, an SRAM block is just too complicated to verify with traditional DRC alone. Designers must employ supplementary verification and debugging techniques, none of which, to date, have provided a complete solution.
Enter pattern matching. A proven verification strategy in other physical verification scenarios, pattern matching in SRAM verification can be defined for precise geometrical and location matching, or to allow a defined tolerance level of difference. Mentor collaborated with leading foundries and design companies over multiple nodes to develop a pattern-based utility that performs fast, accurate SRAM verification and debugging. A comprehensive pattern debugging kit lets designers see exactly where errors were found, and either fix them right away or provide details back to the foundry for inclusion into enhanced SRAM design rules that improve precision for future SRAM verification.
If you find yourself falling off that SRAM high-wire more often than you’d like, check out our white paper, Finding a perfect balance between flexibility and quality in SRAM layouts.