Improve your layout load time without capital investment?

By Roger Kang How many times has this happened to you—you waited for an hour to complete the loading of…

Interactive symmetry checking for analog/custom ICs: Faster, easier, more accurate

By Sara Khalaf While the reliability and performance of multiple types of designs such as analog, MEMs, and image sensors…

A touchy subject: RF IC layout verification

By Neel Natekar Radio frequency (RF) circuitry is an essential component of many of the critical applications we now rely…

How to get to Win-Win-Win in conflict management

By Shelly Stalnaker & Calibre Design staff Anyone who’s been through conflict management training understands the three basic scenarios. There’s…

Innovations in physical verification tools and technologies keep the IC industry moving forward

By John Ferguson A few years ago, I was invited to present a paper discussing the advances in physical verification…

Ease on down the road…why “ease of use” is the next big thing in EDA, and how we get there

Ease of use is an important issue when enhancing product functionality and introducing new technology. Calibre Design Systems considers ease…

Do you trust the reliability of your 2.5D/3D IC package designs?

By Dina Medhat 2.5D/3D ICs have become an innovative solution for many design and integration challenges. Basic physical verification for…

DAC in December?? A Review of Calibre Design Solutions at DAC 2021

Did it feel a bit weird to be submitting research papers for DAC 2022 while packing to go to DAC…

Is there a quick and easy way to calculate P2P resistance or current density between any two coordinates in my IC design layout?

By Li Li Why, yes, there is! As you know, Calibre® PERC™ logic-driven layout (LDL) current density (CD) and point-to-point…