Building a strong reliability foundation with Calibre PERC

By Matthew Hogan How are you handling your reliability verification right now? Custom reliability verification?…

Automated ESD protection verification for 2.5-3D ICs is now a reality

Got the mid-winter blahs? The post-New Year letdown? Looking for something to rev you up?…

Do you have a reliable automated waiver process for reliability verification?

By Dina Medhat – Mentor, A Siemens Business Design rule waivers Maybe a design rule…

Automated Power Model Verification for Analog IPs

By Sierene Aymen and Hartmut Marquardt, Mentor Graphics Eliminating manual work during power intent verification…

An Automated Solution for Voltage-Aware DRC

By Dina Medhat, Mentor Graphics Automated voltage propagation with Calibre PERC makes it easier to…

Electromigration and IC Reliability Risk

By Dina Medhat, Mentor Graphics Gradual damage from electromigration can affect product performance and reduce…

LEF/DEF IO Ring Check Automation

By Matthew Hogan, Mentor Graphics Designing today‚Äôs complex system-on-chips (SoCs) requires careful consideration when planning…

Together At Last – Combining Netlist and Layout Data for Power-Aware Verification

By Beth Martin, with Sridhar Srinivasan, Yi-Ting Lee, and Frank Feng, Mentor Graphics Reliability checks…

Migrating Consumer Electronics to the Automotive Market with Calibre PERC

By Matthew Hogan, Mentor Graphics Calibre PERC can help you succeed in the automotive market…