DRC

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The IC designers complete guide to design rule checking

October 30, 2025

Design rule checking (DRC) ensures IC layouts meet foundry rules. Learn how modern DRC engines like Calibre deliver scalable, sign-off accuracy at advanced nodes

By Calibre IC Design & Manufacturing
7 MIN READ

Smarter DRC for complex designs: Accelerating verification with Calibre nmDRC Recon

April 2, 2025

By John Ferguson The challenge: Traditional DRC can’t keep up… Increasing complexity and automation in IC design have made traditional…

By Calibre IC Design & Manufacturing
4 MIN READ

An introduction to advanced verification techniques for IC design symmetry

November 13, 2024

By Jonathan Muirhead Integrated circuit (IC) design, particularly for analog and radio frequency (RF) circuits, involves meticulous attention to detail…

By Calibre IC Design & Manufacturing
6 MIN READ

Speeding up early design rule checking with Calibre nmDRC Recon

June 5, 2024

By John Ferguson and Nermeen Hossam Chip designers are very aware of how time-consuming early design rule checking (DRC) can…

By Calibre IC Design & Manufacturing
4 MIN READ

A new physical verification reporting solution smooths the on-time tapeout effort

April 16, 2024

By Richard Yan In the intricate world of system-on-chip (SoC) development, Physical Verification (PV) reports serve as vital checkpoints throughout…

By Calibre IC Design & Manufacturing
2 MIN READ

Shifting left with Calibre solutions: Enhancing IP design flow efficiency and design quality

January 31, 2024

By Terry Meeks Designing integrated circuits (ICs) is a multifaceted task that requires the integration of various components, including intellectual…

By Calibre IC Design & Manufacturing
4 MIN READ

3DICs and the multi-physics challenge

December 11, 2023

By John Ferguson Design teams have known since, well, pretty much forever that mechanical stresses and temperature changes can affect…

By Calibre IC Design & Manufacturing
4 MIN READ

Save yourself the time—here’s a way for you to view native block instances from a full-chip context

September 14, 2023

By Ritu Walia Imagine this: You primarily work on the design of a sub-block of an application-specific layout design, or…

By Calibre IC Design & Manufacturing
< 1 MIN READ

First out of the (3DIC) box: How Siemens EDA is using the TSMC 3Dblox standard to change 3DIC verification

March 27, 2023

By John Ferguson In recognition of the growing need for a more holistic approach to three-dimensional integrated circuit (3DIC) design,…

By Calibre IC Design & Manufacturing
2 MIN READ