Part 2: The 2010 Wilson Research Group Functional Verification Study

Part 2: The 2010 Wilson Research Group Functional Verification Study

Design Trends (Continued) In Part 1 of this series of blogs, I focused on design trends (click here) as identified…

Part 1: The 2010 Wilson Research Group Functional Verification Study

Part 1: The 2010 Wilson Research Group Functional Verification Study

Design Trends In my previous blog, I introduced the 2010 Wilson Research Group Functional Verification Study (click here). The objective of…

Prologue: The 2010 Wilson Research Group Functional Verification Study

Prologue: The 2010 Wilson Research Group Functional Verification Study

  Study Overview In 2002 and 2004, Ron Collett International, Inc. conducted its well known ASIC/IC functional verification studies, which…

Language Transitions: The Dawning of Age of Aquarius

Language Transitions: The Dawning of Age of Aquarius

Wally Rhines DVCon 2011 Keynote Highlights Survey on Verification Languages OK, maybe it is not the Dawning of the Age…

SystemVerilog Coding Guidelines: Package import versus `include

SystemVerilog Coding Guidelines: Package import versus `include

Another frequently asked question: Should I import my classes from a package or `include them? To answer this properly, you…

UVM: Joint Statement Issued by Mentor, Cadence & Synopsys

UVM: Joint Statement Issued by Mentor, Cadence & Synopsys

DAC Attendees Invited to Accellera’s Breakfast sponsored by Mentor, Cadence & Synopsys The full statement can be read at EDA…

Static Verification

Static Verification

After spending years verifying ASICs with dynamic simulation, I started working on static verification 10 years ago in a startup…

OVM/UVM at DAC 2010

OVM/UVM at DAC 2010

Visit Booth 1350 – The hub of OVM/UVM Activity at DAC The OVM World booth at the Design Automation Conference…

DAC Panel: Bridging Pre-Silicon Verification and Post-Silicon Validation

DAC Panel: Bridging Pre-Silicon Verification and Post-Silicon Validation

I’d like to encourage you to attend the technical panel titled Bridging Pre-Silicon Verification and Post-Silicon Validation at this year’s …