Accellera Proposes a New Working Group

Accellera Proposes a New Working Group

Accellera to explore the need for an IP Security Assurance Standard In the era of SoC design where major design…

Developing Tests in Reverse with Portable Stimulus

Developing Tests in Reverse with Portable Stimulus

Whether developing tests for software or hardware, test development seems to follow a pretty predictable process: learn about the thing…

Emulation and simulation; invaluable tools for IC verification

Emulation and simulation; invaluable tools for IC verification

Emulation technology has been around for a long time—more than four decades by my count—and industry observers believe more than…

Is Gate-Level Simulation Still Required Nowadays??

Is Gate-Level Simulation Still Required Nowadays??

A colleague recently asked me: Has anything changed? Do design teams tape-out nowadays without GLS (Gate-Level Simulation)? And if so,…

ARM® Techcon Paper Report: How Microsoft Saved 4 Man-Months Meeting Their Coverage Closure Goals Using Automated Verification Management & Formal Apps

ARM® Techcon Paper Report: How Microsoft Saved 4 Man-Months Meeting Their Coverage Closure Goals Using Automated Verification Management & Formal Apps

Few verification tasks are more challenging than trying to achieve code coverage goals for a complex system that, by design,…

Preparing for the Perfect Storm with New-School Verification Techniques

Preparing for the Perfect Storm with New-School Verification Techniques

Between 2006 and 2014, the average number of IPs integrated into an advanced SoC increased from about 30 to over…

Happy Halloween from ARM  TechCon

Happy Halloween from ARM TechCon

MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the Santa Clara Convention Center from…

Part 2: The 2012 Wilson Research Group Functional Verification Study

Part 2: The 2012 Wilson Research Group Functional Verification Study

Design Trends (Continued) In Part 1 of this series of blogs, I focused on design trends (click here) as identified…

Virtual Emulation for Debugging

Virtual Emulation for Debugging

A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According…