RTL - Verification Horizons

It’s hard to believe, but we’re already almost halfway through 2026! Time flies when you’re innovating, and here at Siemens,…

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2022…

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2022 Wilson…

When I learned the SystemVerilog verification features, one concept had me baffled – virtual interfaces. What are these and why…

Wouldn’t it be great if there were something that would stop you from leaving the house wearing mismatched clothes – I mean without a clean design?

The best way to create a System on a Chip is with design IP: blocks that perform common functions such…

Trying to grasp any programming language from scratch can be a difficult task, especially when you start by reading the…

On the short list of positive things to come out of the past year are the formal verification-focused conference papers…

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2020…