Verification Horizons: The DAC 2015 Issue

Verification Horizons: The DAC 2015 Issue

If you were not one of the 100’s of visitors to the Verification Academy booth at DAC 2015 and missed…

Part 10: The 2014 Wilson Research Group Functional Verification Study

Part 10: The 2014 Wilson Research Group Functional Verification Study

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2014…

Part 6: The 2014 Wilson Research Group Functional Verification Study

Part 6: The 2014 Wilson Research Group Functional Verification Study

FPGA Verification Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the…

Who Knew VIP?

Who Knew VIP?

“Who Knew?” about verification IP (VIP), was the theme of a recent DeepChip post by John Cooley on December 18. …

Part 8: The 2012 Wilson Research Group Functional Verification Study

Part 8: The 2012 Wilson Research Group Functional Verification Study

Language and Library Trends This blog is a continuation of a series of blogs that present the highlights from the…

Making formal property checking easy to use

Making formal property checking easy to use

For years one of the objectives in EDA has been to make formal property checking easy to use and its…

Static Verification

Static Verification

After spending years verifying ASICs with dynamic simulation, I started working on static verification 10 years ago in a startup…

SystemC Day Videos from DVCon Available Now

SystemC Day Videos from DVCon Available Now

Noted EDA analyst and guru Gary Smith delivered keynote address: “ESL: Where We Are and Where We’re Going” OSCI sponsored…

SystemVerilog Coding Guidelines

SystemVerilog Coding Guidelines

I have lots of blog entries about 95% ready to publish. This entry is from an e-mail I wrote a…