DVCon USA 2022 How to Avoid the Pitfalls of Mixing Formal and Simulation Coverage

Preview of DVCon 2022 — How to Avoid the Pitfalls of Mixing Formal and Simulation Coverage

With eight papers in two separate sessions focused exclusively on formal verification, one could assert (pun intended) that this year’s…

The Many Flavors of Equivalence Checking: Part 6, FPGA-focused Equivalency Checking Flows

With last year’s acquisition of OneSpin, we now have a valuable addition to the solutions I described in The Many…

58th Design Automation Conference

Build Your Career by Attending the Static & Formal Verification University at DAC 2021

Among the reasons to go to university are the opportunities to open new career paths by learning new technical skills,…

Webinar Preview: Practical Flows for Continuous Integration

But First, The Backstory… I’ll take you back to May 4th 2020 to the last in a series of verification…

How Can You Say That Formal Verification Is Exhaustive?

As a companion to my previous post on Learn Formal the Easy Way, allow me to explain what are often…

Stop

Leave the House With a Clean Design

Wouldn’t it be great if there were something that would stop you from leaving the house wearing mismatched clothes – I mean without a clean design?

Verification Horizons | September 2021

The September Verification Horizons is Now Online!

I’m really excited to share with you a very special issue of the Verification Horizons newsletter for September, 2021. The…

First day of school 2021 - 2022

Learn Formal the Easy Way

The sight of kids going back to school can prompt feelings of joy and renewal – or trigger less pleasant…

Deploying Formal in a DO-254 Program

The primary focus of DO-254, referred to as ED-80 in Europe, is hardware reliability of airborne electronic hardware. DO-254 is…