Latest Posts

What is the Value of Industry Awards?

What is the Value of Industry Awards?

Tessent is a finalist in the influential Elektra Awards. We love awards and think you should too.

What DFT history teaches us

What DFT history teaches us

By Stephen Pateras, Mentor Graphics Two DFT-related rules for success are as true today as they were 30 years ago

Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

Hierarchical DFT: How to Do More, More Quickly, with Fewer Resources

By Rick Fisette, Mentor Graphics Remove ATPG from the critical path to tapeout with hierarchical DFT plus test pattern retargeting…

What to Know about Today’s Scan Diagnosis and Yield Analysis Technologies

What to Know about Today’s Scan Diagnosis and Yield Analysis Technologies

By Geir Eide, Mentor Graphics What to know about today’s scan diagnosis and yield analysis technologies…

Pattern Matching in Test and Yield Analysis

Pattern Matching in Test and Yield Analysis

By Geir Eide and Jonathan Muirhead Analyzing fail data with pattern matching helps companies identify yield limiters faster to increase…

Getting the best of ATPG and LBIST – a Hybrid Test Solution for Autonomous & High-precision IC Test

Getting the best of ATPG and LBIST – a Hybrid Test Solution for Autonomous & High-precision IC Test

By Ron Press, Mentor Graphics Try Hybrid ATPG and LBIST when you need both in-system test and advanced fault detection.

Ensure defect-free automotive ICs with the Hybrid TK/LBIST solution that also finds faults in the DFT logic

Ensure defect-free automotive ICs with the Hybrid TK/LBIST solution that also finds faults in the DFT logic

By Rahul Singhal, Mentor Graphics Near-zero defect testing for safety-critical ICs means also testing the DFT logic.

3D IC Test: Now and the Road Ahead

3D IC Test: Now and the Road Ahead

By Martin Keim, Mentor Graphics What’s new in 3D IC testing? This summary from an ISTFA tutorial has the answers

Take scan test out of the critical path

Take scan test out of the critical path

By Ron Press, Mentor Graphics DFT with less risk to your design flow? Here’s how.