Free webinar – semiconductor test responds to automotive ICs

By Tessent Solutions



The automotive IC market is far and away the fastest growing end-use market and is being flooded by a host of new players. Market leaders like NXP, Infineon, ST, Texas Instruments, On Semiconductor, and Bosch are now joined by Intel, Qualcomm, Apple, Marvell, Nvidia, and Samsung.

The growth of a new IC market has ripple effects along the entire supply chain. In this case, new IC test tools and methods have emerged to meet the special needs of testing automotive ICs. The reshaping of semiconductor test to meet the demands of automotive ICs is the topic of a new IEEE Spectrum webinar presented by Mentor’s Steve Pateras.

Automotive electronics have applications far beyond electronics for established car features, like radio, automatic windows, and power steering. The largest demand is for ICs for the safety-related and autonomous driving features, which come with stringent new reliability requirements as defined by ISO 26262. Many of these ICs are also high-performance, designed to meet the new processing demands as the computational load increases. To get that performance, automotive ICs are increasingly using leading-edge process nodes and the most advanced AI algorithms.

So, we have lots of very complex devices at the most advanced nodes that need to adhere to the ISO 26262 standard — a perfect storm from a semiconductor test perspective that has quickly led to changes in how we do manufacturing and in-system test to achieve functionally safe automotive electronics.

The test strategy for automotive ICs has two main areas of concern:

  1. Ensure manufactured devices are defect free – aiming for zero DPPM in a cost-effective way.
  2. Ensure ongoing, proper operation through the life of the device – find and fix new defects that arise during operation.

For manufacturing quality, the stakes are little different than in the past, when consumer products could tolerate a somewhat higher defect level. For safety-related devices, there is less wiggle room on defects. Pateras describes in the webinar some technologies, including Cell-aware test critical-area based fault models, that are extremely effective in improving DDPM.

After the devices are deployed in an automotive system, how do you ensure they continue to be defect free over time? Through runtime monitoring. The technology for runtime monitoring has advanced beyond simple built-in-self-test (BIST) circuitry. In the webinar, Pateras describes a new in-system test controller (Tessent MissionMode) that manages the communication between the on-chip IP and external systems.

At the board level, the in-system test controllers are connected to a bus (vehicle bus) to communicate to the safety processor of the car, which can then run any of the test resources on the devices. There are several ways to configure the controller – real-time CPU access, or use stored sets of instructions—to balance between latency and chip area overhead.

The random tests of logic BIST decrease in effectiveness as more tests are applied. But, using test points reduces the test time and catches defects that are resistant to random patterns. This means you need fewer random patterns to get to 90% defect coverage.

Other strategies to reduce test time have been developed, which Pateras covers in the webinar.

The fast-growing automotive IC market is changing the way we think about semiconductor test. New technologies, tools, and methods help to enable the emergence of autonomous vehicles.

View the one-hour free webinar


This article first appeared on the Siemens Digital Industries Software blog at