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Dr. Wally Rhines talks about the business of test

Dr. Wally Rhines talks about the business of test

Dr. Wally Rhines, the chairman and CEO of Mentor Graphics is one of the most dynamic and engaging speakers in…

Best practice in scan pattern ordering for test and diagnosis

Best practice in scan pattern ordering for test and diagnosis

By Jay Jahangiri and Wu Yang, Mentor Graphics By creating and applying scan patterns in the right order, you can…

Expose Transistor-level Yield Limiters with Cell-aware Diagnosis

Expose Transistor-level Yield Limiters with Cell-aware Diagnosis

Improve yield and failure analysis by identifying defects inside standard cells. Learn more in this new whitepaper.

Transistor-Level Defect Diagnosis

Transistor-Level Defect Diagnosis

By Geir Eide, Mentor Graphics Need to diagnose silicon failures faster and with more accuracy? Try the new cell-aware diagnosis…

ISTFA 2016 – New tools and product demos – Tessent SiliconInsight

ISTFA 2016 – New tools and product demos – Tessent SiliconInsight

In this video – How Tessent SiliconInsight improves the silicon bring-up flow.

Scan ATPG and compression are beating Moore’s law

Scan ATPG and compression are beating Moore’s law

By Ron Press, Mentor Graphics Why hasn’t IC test become a bottleneck in creating ever more advanced semiconductors? In this…

Improve IC development and reduce risk for big designs by moving DFT up and left

Improve IC development and reduce risk for big designs by moving DFT up and left

By Ron Press, Mentor Graphics   Complete all the DFT work weeks earlier than usual by using a hierarchical test…

Cell-aware Test Introduction

Cell-aware Test Introduction

As IC makers move to smaller geometries and complex FinFETs, the existing fault models and test patterns are becoming less…

Ordering scan patterns for cost-effective test and diagnosis

Ordering scan patterns for cost-effective test and diagnosis

To control test cost, the order in which test patterns are created and applied matters…