D&R IP-SoC Day 2022 Silicon Valley

Siemens EDA talks cybersecurity at IP-SoC Silicon Valley

The Tessent group participated in the “unique event fully dedicated to IP and IP-based electronic systems,” D&R IP-SoC Silicon Valley…

Automated shared bus interface memory test

Webinar: Memory test using a shared bus Interface

The explosive growth in the use of memory content on SoCs calls for a new solution to effectively access the…

Join Siemens EDA at GOMACTech 2022

Where design and innovation meets tomorrow Siemens EDA is looking forward to exhibiting a broad array of technologies spanning from…

Webinar: Smarter DFT architecture for advanced SoCs

Leonardo DaVinci said that “Simplicity is the ultimate sophistication.” Semiconductor design is a very complex process, and every step of…

Webinar: Break through yield barriers with Siemens and PDF Solutions

Webinar now available on-demand With the high cost of developing ICs at advance nodes, the pressure to maximize yield and…

For secure chips, use high-quality test and embedded analytics

There is growing concern over the security of ICs used not just in aerospace and military devices, but also in…

Tessent earns TSMC OIP Partner of the Year for 3DFabric collaboration

Recognition of Tessent’s excellence in next-generation system-on-chip and 3DIC design enablement. Siemens EDA takes industry partnerships seriously, and sometimes we…

ISTFA 2021

Don’t miss the 47th International Symposium for Testing and Failure Analysis (ISTFA 2021) in Phoenix, Arizona from October 31 to…

ITC 2021 logo

International Test Conference 2021

Join Siemens at the International Test Conference 2021 (ITC) to be held virtually from October 10-15, 2021. We’ll be showcasing technologies…