This blog will cover next generation High-Level Synthesis (HLS) design and verification methodologies and techniques. Actual users will be talking…
Excerpt from article: “Why TinyML is Such a Big Deal“ “If you just compile everything onto the controller, even at…
Smart DFT for quality and TTM Don’t let your plans for successful new SoCs be derailed by a lack of…
Don’t miss the AI Hardware Summit from September 13-16, 2021. The summit is THE place for those acceleratingAI workloads in…
Experts from Siemens, Groq, Hewlett Packard Enterprise, and Mythic team up to discuss AI chip design and deployment. Please join…
At the 2021 IEEE International Test Conference, Tessent experts are presenting on bringing 1149.10 to life, progress in scan test…
The 2021 IEEE International Test Conference is a virtual event this year, streaming live to the world from Wednesday, August…
Turn complexity into a competitive advantage by harnessing system-level data to optimize manycore AI and ML chips. Our new on-demand…
Newly renamed and upgraded, the Tessent™ SystemInsight integrated development environment (IDE) now supports cycle-accurate processor trace and a range of…
