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SerDes Design Part 1: Take the First Steps Towards SerDes Channel Compliance

Last year I wrote an article for EEWorld Online, comparing Channel Operating Margin (COM) with…

It’s Easier (and Less Expensive) to Check for Differential Pairs than You Think!

As a layout engineer, you have mastered the art of multitasking. You are thinking about…

What Do a Gigging Guitarist and a PCB Designer Have in Common?

More than you think! While most of us would not consider guitarists as experts in…

Detect Floating Metal Islands to Avoid EMI

Are you concerned with the accuracy and time spent in manual inspection of your board?…

More Free Time! Did I Tell You about the Universal Board Viewer Feature?

As an electrical engineer (EE), you probably have a PCB designer laying out circuit boards…

Can Your Verified PCB Design Fail in the Lab (or in the Field)?

Design verification is typically performed before building the design prototype or manufacturing the design. These…

Want More Free Time? Come and Get It!

Download FREE electrical rule checks. No strings attached. Are you tired of manually inspecting your…

So You’ve Found DDR Design Problems. Now What?

After identifying design issues and their root cause(s), the next step is to fix them…

Several Phenomena can Cause DDR Signals to Behave Badly

Often, either the setup or hold time margin may be very low. If setup is…