FinFET

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Parasitic Extraction for Accurate Signal Integrity Analysis at Advanced Nodes

Parasitic Extraction for Accurate Signal Integrity Analysis at Advanced Nodes

March 15, 2016

By Karen Chow, Mentor Graphics Signal integrity analysis at advanced nodes requires new and enhanced parasitic extraction techniques

By Calibre IC Design & Manufacturing
7 MIN READ
Parasitic Extraction of FinFET-based Memory Cells

Parasitic Extraction of FinFET-based Memory Cells

June 11, 2015

By Karen Chow, Mentor Graphics Accurate and efficient FinFET characterization requires a parasitic extraction tool that can apply different extraction…

By Calibre IC Design & Manufacturing
6 MIN READ
Designing and Testing FinFet-based IC Designs

Designing and Testing FinFet-based IC Designs

March 31, 2015

By Carey Robertson and Steve Pateras, Mentor Graphics Are your processes ready for finFETs?

By Calibre IC Design & Manufacturing
4 MIN READ