Do you trust the reliability of your 2.5D/3D IC package designs?

By Dina Medhat 2.5D/3D ICs have become an innovative solution for many design and integration challenges. Basic physical verification for…

IC package designers—looking for multi-die, system-level signoff verification?

By Shelly Stalnaker Ever tried a food sample when you were shopping…not just because it’s free food (!), but because…

Do you need an automated ESD verification methodology for 2.5D/3D ICs? If so, read on…

By Dina Medhat Electrostatic discharge (ESD) events cause severe damage to unprotected integrated circuits (ICs). You already know that, of…

ESD protection verification in 2.5/3D ICs is HARD (or is it?) Our on-demand webinar has the answer

By Calibre Staff Electrostatic discharge (ESD) is a big worry for integrated circuit (IC) designers, for good reason. A bit…

Mentor receives 2020 TSMC OIP Partner of the Year awards for EDA solutions

By Shelly Stalnaker – Mentor, A Siemens Business While the structure of the TSMC OIP Ecosystem Forum had to change…

Not yet a fan of fan-out? Why you should be!

Not yet a fan of fan-out? Why you should be!

By John Ferguson, Mentor Graphics FO-WLP combines multiple die from heterogeneous processes into a compact package, and that’s a good…

Why Do We Need Assembly Design Kits for Packages?

Why Do We Need Assembly Design Kits for Packages?

By John Ferguson and Tarek Ramadan, Mentor Graphics Why do we need assembly design kits for IC packages?