Design with Calibre

The industry-leading Calibre toolsuite provides physical verification (DRC), circuit verification (LVS, PEX), and reliability verification (PERC), as well as Calibre DFM optimization, to ensure IC designs will deliver the power, performance, and foundry yield today’s markets demand. Across all process nodes and design styles, innovative functionality ensures the Calibre toolsuite provides accurate, efficient, comprehensive IC verification while minimizing resources and tapeout schedules.

Latest posts

Do my database merges make my runtimes too slow?

November 20, 2017

By Saunder Peng – Mentor, A Siemens Business Merging databases often creates bottlenecks in the design and verification flow, wasting…

By Design With Calibre

3 MIN READ

Shocking news about ESD protection!

November 14, 2017

By Derong Yan – Mentor, A Siemens Business Electrostatic discharge (ESD) protection is critical for today’s electronic products, which require…

By Design With Calibre

3 MIN READ

Using Body Bias in High Performance, Low Power Electronics

October 17, 2017

By Flint Yoder – Mentor, A Siemens Business The body bias effect is used to tune circuit behavior to meet…

By Design With Calibre

2 MIN READ

The Chicken or the Egg? Finding Litho Hotspots Before Design Rules Exist

September 25, 2017

By Wael ElManhawy and Joe Kwan – Mentor, A Siemens Business Which comes first, accurate design rules or real designs?…

By Design With Calibre

2 MIN READ

How Mentor is Helping You Make Silicon Photonics a $1.3B market by 2022

September 21, 2017

By Michael Buehler-Garcia, Senior Director, D2S Calibre Marketing – Mentor, A Siemens Business Companies who want to explore the potential…

By Design With Calibre

4 MIN READ

Now You See Them…Now You Don’t: Recognizing DP Errors at Advanced Nodes

September 18, 2017

By David Abercrombie and Alex Pearson – Mentor, A Siemens Business At advanced nodes, designers need enhanced error visualization and…

By Design With Calibre

3 MIN READ

Calibre Collaboration and Innovation on Display at TSMC OIP Santa Clara

September 15, 2017

At the TSMC Open Innovation Platform® (OIP) event in Santa Clara on September 13, Mentor was privileged to co-present with…

By Design With Calibre

4 MIN READ

GIGO, or Why Data Integrity Matters

September 11, 2017

By James Paris – Mentor, A Siemens Business Design data integrity is crucial to both product quality and tapeout schedules….

By Design With Calibre

2 MIN READ

Node Migration—What Does it Really Cost You?

September 1, 2017

By John Ferguson – Mentor, A Siemens Business Deciding when and how to make a process node transition is critical…

By Design With Calibre

2 MIN READ