Part 10: The 2022 Wilson Research Group Functional Verification Study

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2022…

Part 6: The 2022 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2022 Wilson…

My Day At The Beach - Early

UVM Testbench Debug – A Day At The Beach – Right?

Some people think UVM Testbench Debug is a drag. But really, it depends. I think it’s a day at the…

Part 10: The 2020 Wilson Research Group Functional Verification Study

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2020…

Part 6: The 2020 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2020 Wilson…

How do you spell UVM? Opportunities in professional development.

How do you spell UVM? Opportunities in professional development.

A few months ago I had the honor of being invited to lecture a graduate-level course on functional verification. After…

Part 10: The 2018 Wilson Research Group Functional Verification Study

Part 10: The 2018 Wilson Research Group Functional Verification Study

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2018…

Part 6: The 2018 Wilson Research Group Functional Verification Study

Part 6: The 2018 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2018 Wilson…

Evolving Product Lifecycle Requires New Debugging Skills

Evolving Product Lifecycle Requires New Debugging Skills

There’s a wonderful quote in Brian Kernighan book The Elements of Programming Style, where he says “Everyone knows that debugging…