How do you spell UVM? Opportunities in professional development.

A few months ago I had the honor of being invited to lecture a graduate-level…

Part 10: The 2018 Wilson Research Group Functional Verification Study

IC/ASIC Language and Library Adoption Trends This blog is a continuation of a series of…

Evolving Product Lifecycle Requires New Debugging Skills

There’s a wonderful quote in Brian Kernighan book The Elements of Programming Style, where he…

How To Connect Your Testbench to Your Low Power UPF Models

Face facts: power supply nets are now effectively functional nets, but they are typically not…

Part 10: The 2016 Wilson Research Group Functional Verification Study

ASIC/IC Language and Library Adoption Trends This blog is a continuation of a series of…

Prologue: The 2016 Wilson Research Group Functional Verification Study

This is the first in a series of blogs that presents the findings from our…

UVM: The Factory Powers Reuse

As I mentioned in my last UVM post, UVM allows engineers to create modular, reusable,…

Part 6: The 2014 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs…

UVM Debug. A contest using class based testbench debug…

Still having fun doing UVM and Class based debug? Maybe a debug contest will help….