emulation - Verification Horizons

Exploring essential concepts in Formal Verification

September 18, 2024

What is a witness? is it the same as a counterexample? A witness is a sequence of inputs that demonstrates…

By Nicolae Tusinschi

3 MIN READ

Jump-Start Your UVM Journey with UVM Framework (UVMF)

September 4, 2024

Bob Oden shares insights on how the Universal Verification Methodology Framework (UVMF) is revolutionizing the verification landscape. UVMF is an advanced toolset that…

By Dennis Brophy

2 MIN READ

Part 9: The 2022 Wilson Research Group Functional Verification Study

December 18, 2022

ASIC Verification Technology Adoption Trends This blog is a continuation of a series of blogs related to the 2022 Wilson Research…

By Harry Foster

3 MIN READ

Leave the House With a Clean Design

September 14, 2021

Wouldn’t it be great if there were something that would stop you from leaving the house wearing mismatched clothes – I mean without a clean design?

By Chris Giles

7 MIN READ

The September Verification Horizons is Now Online!

September 2, 2021

I’m really excited to share with you a very special issue of the Verification Horizons newsletter for September, 2021. The…

By Tom Fitzpatrick

3 MIN READ

Siemens EDA launches new Veloce hardware-assisted verification system

March 26, 2021

Siemens Digital Industries Software today unveiled its next-generation Veloce™ hardware-assisted verification system for the rapid verification of highly sophisticated, next-generation integrated circuit (IC) designs. This is the first complete, integrated offering that combines best-in-class virtual platform, hardware emulation, and Field Programmable Gate Array (FPGA) prototyping technologies and paves the way to leverage the latest powerful hardware-assisted verification methodologies.

By Dennis Brophy

< 1 MIN READ