Questa Verification IP - Verification Horizons

DVCon US 2026 Keynote Verification Convergence

DVCon US Keynote: Why Verification Must Evolve in the Convergence Era

March 25, 2026

At DVCon US 2026, a keynote delivered by three speakers—Abhi Kolpekwar (Siemens EDA), Jean-Marie Brunet (Siemens EDA), and Alon Shtepel…

By Harry Foster

3 MIN READ

Siemens at DVCon U.S. 2026

February 22, 2026

DVCon U.S. returns to a larger venue at the Hyatt Regency Santa Clara. The expanded rooms and exhibit hall are intended to support a program heavily focused on AI in verification.

By Dennis Brophy

4 MIN READ

FutureCast 2026: A Special Holiday Edition of BUGGED OUT

December 9, 2025

As another year closes, the semiconductor industry finds itself in a moment of transition—one where the pace of innovation is…

By Harry Foster

2 MIN READ

Introducing BUGGED OUT — A new bite-sized podcast for verification engineers

November 10, 2025

BUGGED OUT Podcast

By Harry Foster

2 MIN READ

Siemens at DVCon India 2025: Driving the Future of Design and Verification

August 26, 2025

DVCon India 2025, taking place on September 10–11 at the Radisson Blu, Marathahalli, Bengaluru, will mark a special milestone—its 10th anniversary. Over the past decade, DVCon India has grown into one of the region’s most influential conferences for design and verification professionals. Siemens will be prominently featured across vision talks, technical papers, posters, and workshops, showcasing its leadership in AI-driven EDA, hardware-assisted verification, and formal methodologies.

By Dennis Brophy

2 MIN READ

Reminder: DVCon U.S. 2026 Call for Papers – Sept 7th Deadline Approaching!

August 25, 2025

The DVCon U.S. 2026 Call for Papers deadline is Sunday, September 7th at 11:59 PM. Don’t miss your chance to share your expertise…

By Dave Rich

< 1 MIN READ

Siemens EDA at FMS 2025 – Shaping the Future of Memory and Storage

July 31, 2025

We’re excited to connect with fellow innovators, engineers, and industry leaders at FMS 2025. Whether you’re attending our sessions or stopping by Booth #1140, we look forward to sharing the latest technical advancements in verification IP, system-level validation, and memory and interconnect technologies.

By Dennis Brophy

2 MIN READ