Verification Horizons

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PCI Express 8.0: Powering AI, Cloud, and HPC with Transformative Interconnect Technology

April 9, 2026

PCIE Gen 8 is available now!

PCIe Express 8.0 is a fundamental leap forward in interconnect technology. By doubling data rates to an unprecedented 256 GT/s per lane, PCIe Gen8 promises to unlock new possibilities across industries, from enabling more sophisticated AI training workflows to supporting the complex AI models and multi-sensor ecosystems that will define next-generation vehicles.

By Gyanaranjan Khuntia
5 MIN READ

Latest posts

Verification is from Vulcan, Validation is from Pandora

Verification is from Vulcan, Validation is from Pandora

May 3, 2018

At DVCon earlier this year, I was lucky enough to present to the munching masses at the Wednesday lunch. Now,…

By Doug Amos
4 MIN READ
Significantly Improve Your FPGA Design Reliability by Using Custom CDC Synchronizers

Significantly Improve Your FPGA Design Reliability by Using Custom CDC Synchronizers

April 24, 2018

[Preface: we are presenting a paper on this topic at the upcoming SEE/MAPLD conference, May 21-24, 2018 in La Jolla,…

By Joe Hupcey III
5 MIN READ
Accellera Proposes a New Working Group

Accellera Proposes a New Working Group

April 6, 2018

Accellera to explore the need for an IP Security Assurance Standard In the era of SoC design where major design…

By Dennis Brophy
2 MIN READ
NVMe – To the rescue of the Storage Revolution Bottleneck

NVMe – To the rescue of the Storage Revolution Bottleneck

April 4, 2018

“Between the dawn of civilization and 2003, we only created five exabytes; now we’re creating that amount every two days….

By Pradeep Salla
2 MIN READ
DVCon China 2018: Driving the Next Big Wave in Verification!

DVCon China 2018: Driving the Next Big Wave in Verification!

March 27, 2018

DVCon is recognized as the premiere industry-focused functional design and verification conference. In fact, today DVCon has grown from a…

By Harry Foster
2 MIN READ
OVL: The Free, Open Assertion Library You Can Use To Jump Start Your Formal Testbench

OVL: The Free, Open Assertion Library You Can Use To Jump Start Your Formal Testbench

March 26, 2018

You’ve watched all the Verification Academy videos on getting started with formal verification, and even tried some of the examples…

By Joe Hupcey III
5 MIN READ
The New Verification Horizons is Here!

The New Verification Horizons is Here!

March 19, 2018

  Our March issue of Verification Horizons is now available here. Aside from giving me a chance to work through my…

By Tom Fitzpatrick
< 1 MIN READ
New! Get your IEEE 1800-2017 SystemVerilog LRM at no charge

New! Get your IEEE 1800-2017 SystemVerilog LRM at no charge

February 25, 2018

Updated Feb 26, 2018: IEEE releases 1800-2017 Standard. Today at this week’s DVCon 2013 conference, the IEEE Standards Association (IEEE-SA)…

By Dave Rich
< 1 MIN READ
New and Improved SystemVerilog 1800-2017

New and Improved SystemVerilog 1800-2017

February 23, 2018

The IEEE-SA has a policy of keeping standards active by making sure they get a cycle of updates every 10…

By Dave Rich
3 MIN READ