SystemVerilog has many ways to store your data. Vectors, arrays, structures, classes, and probably several more ways that I don’t…
As the technology scales or shrinks, there are always some bottlenecks that need to be addressed sometimes it is the…
[Preface / reminders: Part 1 of this series focused on synthesis validation with LEC and SLEC, Part 2 describes how…
[Updated 5/27/2020] The webinar went off without a hitch and is now available for viewing on-demand at mentor.com. I’m pleased…
This blog is an exciting next step – exciting for me at least! – that builds on what I proposed…
Just like time and the tides, the complexity of electronic systems, and the need to verify that they will function…
Introduction My previous blog posts were on static and parameterized classes to get you ready for the big game –…
Our discussion around building integrated verification methodologies started with where techniques apply to design by plotting options for verifying low,…
The forums on the Verification Academy have been around for about a decade (even longer if you count its origins…
