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The Grapes Are Ready

The Grapes Are Back! And Cake! And C Tests with UVM and Transactions For All! Easy.

September 8, 2025

The grapes have returned – this weekend was “harvest” time. Jelly everywhere. A lot like this year here at Siemens….

By Rich Edelman
3 MIN READ
First-Silicon Success

Why First-Silicon Success Is Getting Harder for System Companies

September 3, 2025

First-silicon success is getting harder.

Everyone wants their own chip. Few are hitting first-silicon success.

That’s the paradox shaping today’s semiconductor landscape.

In the 2024 Siemens EDA / Wilson Research Group Functional Verification Study, which I authored, we found that only 14% of ASIC/SoC projects achieved first-silicon success — the lowest figure in more than twenty years of tracking this data.

By Harry Foster
3 MIN READ
DVCon India 2025 - 10th Anniversary

Siemens at DVCon India 2025: Driving the Future of Design and Verification

August 26, 2025

DVCon India 2025, taking place on September 10–11 at the Radisson Blu, Marathahalli, Bengaluru, will mark a special milestone—its 10th anniversary. Over the past decade, DVCon India has grown into one of the region’s most influential conferences for design and verification professionals. Siemens will be prominently featured across vision talks, technical papers, posters, and workshops, showcasing its leadership in AI-driven EDA, hardware-assisted verification, and formal methodologies.

By Dennis Brophy
2 MIN READ

Reminder: DVCon U.S. 2026 Call for Papers – Sept 7th Deadline Approaching!

August 25, 2025

The DVCon U.S. 2026 Call for Papers deadline is Sunday, September 7th at 11:59 PM. Don’t miss your chance to share your expertise…

By Dave Rich
< 1 MIN READ

Siemens EDA at FMS 2025 – Shaping the Future of Memory and Storage

July 31, 2025

We’re excited to connect with fellow innovators, engineers, and industry leaders at FMS 2025. Whether you’re attending our sessions or stopping by Booth #1140, we look forward to sharing the latest technical advancements in verification IP, system-level validation, and memory and interconnect technologies.

By Dennis Brophy
2 MIN READ

Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025

June 17, 2025

Industrial-Grade AI in EDA

By Harry Foster
2 MIN READ
First-Silicon Success

Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC

June 17, 2025

The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine…

By Harry Foster
2 MIN READ
Questa One Functional Safety

Accelerated Safety Assurance with Questa One Functional Safety Solution

June 16, 2025

Explore how the Questa One Functional Safety Solution delivers accelerated safety assurance

By Jake Wiltgen
4 MIN READ

From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA

June 3, 2025

As we gear up for the 62nd Design Automation Conference (DAC) in San Francisco, one of the most anticipated events…

By Harry Foster
3 MIN READ