Class is back in session this October: Verification Academy’s cutting-edge weekly webinar series
Verification Academy’s fall semester starts this October with the following series of weekly deep dive webinars. Abstracts and registration links below.
WEDENESDAY, October 1 | 8:00 AM – 9:00 AM PST
Did You Know QuestaSim Supports VHDL-2019?
Abdelrahman Tharwat
In this webinar, we will explore how VHDL-2019 introduces a set of powerful features and enhancements that aim to simplify design processes, improve code readability, and provide better support for advanced design methodologies. In this webinar, we will explore the VHDL-2019 supported features in QuestaSim.
WEDENESDAY, October 8 | 8:00 AM – 9:00 AM PST
Breaking Silos: Creating Synergistic Flows for Next-Gen Verification
Nicolae Tusinschi and Kirolos Magdy
In this webinar, we will introduce a revolutionary approach to building synergistic verification environments using Questa™ Developer/IVE’s integrated ecosystem and Discover how to transform fragmented verification processes into seamless, collaborative flows that unite design and verification teams.
WEDENESDAY, October 15 | 10:00 AM – 11:00 AM PST
Ultra Accelerator Link (UALink) Verification: A Deep Dive with Siemens Avery Verification IP
Justin Bunnel
In this webinar, we will introduce how to explore the Ultra Accelerator Link (UALink) specification, an advanced interconnect designed to enable the full potential of next-generation AI and high-performance computing systems, and discover how Siemens Avery Verification IP can support your development.
*** THURSDAY ***, October 23 | 8:00 AM – 9:00 AM PST
Improving Verification Productivity Using Questa One Sim
Karim Ameziane
In this webinar, we will introduce how Questa One Sim delivers “Faster engines, enabling Faster engineers, and finish your verification in Fewer workloads” to significantly boost your RTL design and verification productivity.
WEDENESDAY, October 29 | 10:00 AM – 11:00 AM PST
Portable Stimulus: What can it do for me?
Matthew Taylor (Doulos)
In this webinar, Portable Stimulus Standard (PSS) expert Matthew Taylor will Illustrate what PSS can do for you using a simple UVM example, provide details about the PSS language itself, explain the differences between PSS and other languages, and provide some examples using Siemens Questa One Sim.
And please save the dates for these November webinars:
November 5, 8:00 am – 9:00 am PST
Verification and debugging complex security breaches in your design
Nicolae Tusinschi and Vlada Kalinic
November 12, 8:00 am – 9:00 am PST
VHDL Debug in Visualizer Part 1 of 2: DUT/RTL Debug
Robert Hoogestryd
Welcome back to school, everyone!!!
The Verification Academy team
Reference / catch-up on prior classes: on-demand webinars on verificationacademy.com now:
Generating SVA with Questa One Property Assist AI
Accelerating Functional Coverage with Questa One Sim CX
Tackling Emerging DFT Verification Challenges with Questa One
Enhancing Automotive Safety Verification Using Questa One Sim FX
Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity
Streamlining Requirements Traceability using Questa Verification IQ Testplan Author
Solving the Semiconductor Verification Crisis: From Problem to Productivity
Enhancing Defect Coverage in Design for Testability (DFT) with Functional Fault Grading
Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity
Securing your FPGA Design from RTL through to the Bitstream
Faster Debug Using QuestaSim Interactive Coverage Analysis
Smart Debug: Accelerate root cause analysis and reduce debug turnaround time with Questa Verification IQ Regression Navigator
Accelerating Innovation: PCIe Gen7 Verification for High-Speed Designs
Safety Analysis for Automotive Chips Based on ISO 26262
Faster Debug of Complex Testbenches Using Visualizer
Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream
Smart Regression: Optimize Regression Efficiency Using Questa Verification IQ Regression Navigator
Streaming FPU verification with an alternative to C-reference model approaches
An end-to-end functional safety solution for automotive ICs based on ISO 26262
Explore how to protect against data corruption with formal security verification
Unlocking the Power of QuestaSim and Visualizer Integration
