The UVM : Is it Safe?

The UVM : Is it Safe?

Is It Safe? It depends. What is the context? Economy? Geo-political situation? Teenage drivers? UVM? I don’t know. Do you…

Straight-up Smash-mouth Debug

Straight-up Smash-mouth Debug

I’m having a bad day. Lots of work. Lots of moving parts. We’ve all been there. Nothing new. >> Too…

So You Want a Different UVM Report Server. Doesn’t Everyone? Where To Start…

So You Want a Different UVM Report Server. Doesn’t Everyone? Where To Start…

So. You want a different report server. Maybe something fancier. Maybe something simpler. Maybe something with special formatting. How to…

Debugging Complex UVM Testbenches

Debugging Complex UVM Testbenches

Modern complex chips necessarily have modern complex testbenches. The testbenches of old – wiggling one pin at a time and…

Holiday UVM Register Indigestion

Holiday UVM Register Indigestion

Happy Holidays! Hopefully, wherever you are you are enjoying some time off. At our house, we’re planning a large dinner,…

Debugging My UVM Factory and UVM Config

Debugging My UVM Factory and UVM Config

UVM and Better Debug – The UVM Factory and Config conspire against me   Sitting in my chair pulling out…

Still waiting… It’s Friday afternoon, and I don’t have my RTL

Still waiting… It’s Friday afternoon, and I don’t have my RTL

Using SystemVerilog to model RTL behavior in a pinch or anytime A couple weeks ago, sitting here in California on…

What’s Going On With My SystemVerilog Queue?

What’s Going On With My SystemVerilog Queue?

I want my MTV! And while I’m at it, I’m also curious about what’s going on with my SystemVerilog queues….

UVM Debug. A contest using class based testbench debug…

UVM Debug. A contest using class based testbench debug…

Still having fun doing UVM and Class based debug? Maybe a debug contest will help. I had a contest with…