Semiconductor Packaging

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Monolithic scaling limitations drive the growth of 2.5/3D multi-chiplet, heterogeneous integration that enables PPA targets to be met. Our integrated flow addresses prototyping challenges to signoff for FOWLP, 2.5/3D IC, and other emerging integration technologies.

Learn more about semiconductor packaging design and verification.

Featured posts

3D IC design solutions: 2024 – Year in review

December 16, 2024

Welcome to a look back at a landmark year in 3D IC technology — 2024 was nothing short of revolutionary!…

By John McMillan
3 MIN READ
Text that says what's new in IC Packaging 2409 next to a stylized X

What’s new in IC Packaging 2409

September 19, 2024

The 2409 release is a landmark update in the field of electronic design automation (EDA), introducing a next-generation solution for…

By Keith Felton
3 MIN READ

Siemens introduces Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

July 31, 2024

Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

By John McMillan
4 MIN READ

Latest posts

User2User 2024: Silicon photonics to integrate chiplets: Swissbit

September 17, 2024

Swissbit is pioneering chiplet and system-on-package solutions that embed security and functional safety from the design phase to meet stringent requirements in harsh industrial and automotive environments.

By John McMillan
3 MIN READ
User2User 2024: Chiplets for future automotive application: Fraunhofer

User2User 2024: Chiplets for future automotive application: Fraunhofer

September 11, 2024

Andy Heinig, Head of Department Efficient Electronics at Fraunhofer, explains why automotive is especially a good market and enabler for chiplets and presents different use cases for chiplets that are on the horizon.

By John McMillan
3 MIN READ

The evolution of machine learning (ML) in the physical design and verification of semiconductor packages

August 14, 2024

Discover how Siemens’ EDA evolution of machine learning in the physical design and verification of semiconductor packages.

By John McMillan
2 MIN READ

User2User 2024: EMIB based advanced packaging flow – Intel Foundry

August 12, 2024

Learn how Intel uses 3DIC verification to leverage Siemens XSI & Calibre 3DSTACK for DRC, LVS, assembly checks. Explore methodologies for high-performance systems.

By John McMillan
3 MIN READ

Why is a comprehensive workflow essential for chiplet design and today’s 3D IC architectures?

August 8, 2024

Explore this infographic to learn why a comprehensive workflow essential for chiplet design and today’s 3D IC architectures.

By John McMillan
2 MIN READ

The multi-physics challenge: Known good die may not behave in 3D IC as stand alone!

August 5, 2024

Discover how Siemens’ EDA tackles the multi-physics challenge to achieve fast, accurate assembly-level physical verification.

By John McMillan
2 MIN READ

Siemens introduces Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

July 31, 2024

Innovator3D IC – a comprehensive multiphysics cockpit for 3D IC design, verification and manufacturing

By John McMillan
4 MIN READ

User2User 2024: xPD xSI PDK design enablement – Beyond Xpedition templates

July 30, 2024

PDK enablement beyond using Expedition templates, focusing on the challenges and solutions related to updating packaging tool functionality.

By John McMillan
2 MIN READ

The role of AI-infused EDA solutions for semiconductor-enabled products and systems

July 23, 2024

Discover why semiconductor-enabled products and systems are demanding AI-infused solutions and how AI is changing the nature of semiconductor design.

By John McMillan
2 MIN READ