Industry: Electronics & Semiconductors

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Package designers need assembly-level LVS for HDAP verification

December 5, 2023

While advanced integrated circuit (IC) packaging is a fast-growing market, comprehensive package verification still has a ways to go. Unique…

By John McMillan
2 MIN READ

Understanding 3D IC Technology: Unveiling the Future of Integrated Circuits

November 6, 2023

Delve into the world of 3D IC technology, its architecture, benefits, and applications. Learn how it’s reshaping the future of integrated circuits for enhanced performance and efficiency.

By John McMillan
6 MIN READ
2.5D and 3D IC design testing challenges

Shifting left for earlier testing in 2.5D and3D IC design

March 2, 2023

In our last 3D IC blog, we talked about the impact of 3D IC on device reliability. In today’s blog,…

By Heather George
18 MIN READ
3D heterogeneous integration devices with multiple 3D IC components

The impact of 3d heterogeneous integration on semiconductor device reliability

December 8, 2022

So far in our 3D IC blog series, we’ve discussed front-end design approaches to develop 3D IC-based devices, the importance…

By Heather George
21 MIN READ
Test engineer performing design rule checks manually for 3D IC heterogenous designs

Assembly level layout vs. schematic in 3D IC design verification

November 8, 2022

In our fifth podcast on 3D IC design workflows, we discussed what a 3D IC physical design workflow looks like,…

By Heather George
16 MIN READ
Engineer seated at computer studying physical prototype for early planning of interconnect systems and design verification workflows

Importance of early planning for interconnect verification in 3D IC physical design workflows

October 24, 2022

In our last podcast on 3D IC architecture workflows, we discussed how a system or microarchitectures determine how to partition…

By Heather George
16 MIN READ
3D IC design engineer using gloved hands to inspect and verify components

Front-end architectural verification considerations for 3D IC design

October 11, 2022

So far in our 3D IC blog series, we’ve discussed efforts to create chiplet ecosystems, design workflow changes needed to…

By Heather George
18 MIN READ

The Five Keys to Next-Generation IC Packaging Design: Part 1

September 7, 2022

Part 1: An advanced IC packaging design and verification solution For many applications, next generation IC packaging is the best…

By Keith Felton
2 MIN READ

3D IC verification requires a golden netlist that allows exceptions

August 29, 2022

With current 3D IC packaging technologies, since the system-level netlist (the 3D IC design intent) drives system-level LVS verification, designers…

By Tarek Ramadan
< 1 MIN READ