Patrick Carrier
Understanding distribution of current in via arrays

Understanding distribution of current in via arrays

May 18, 2023
The path of least resistance We all like to take the path of least resistance. If only it were easier...
By Patrick Carrier
< 1 MIN READ
Accuracy in HyperLynx

Accuracy in HyperLynx

February 15, 2017
I frequently get asked, “what is the maximum frequency that you can simulate in HyperLynx?”  And I usually say that...
By Patrick Carrier
< 1 MIN READ
The Simulation Advantage

The Simulation Advantage

February 10, 2017
The advent of high-speed serial links added many challenges to the process of designing PCBs.  In some ways, it made...
By Patrick Carrier
< 1 MIN READ
Correlation up to 50GHz

Correlation up to 50GHz

February 9, 2017
Last week I attended DesignCon, and as usual correlation between simulation and measurement was a hot topic, especially for the...
By Patrick Carrier
< 1 MIN READ
Decoupling Analysis for Trace-Routed PDNs

Decoupling Analysis for Trace-Routed PDNs

September 29, 2016
Performing an accurate high-frequency analysis of a power distribution network routed with traces instead of planes poses some interesting challenges.  Most...
By Patrick Carrier
< 1 MIN READ
The Simplest of Power Integrity Issues

The Simplest of Power Integrity Issues

September 6, 2016
By far, DC Drop issues are the simplest problems you can run into when designing a power distribution network or...
By Patrick Carrier
< 1 MIN READ
High current density – is it a problem?

High current density – is it a problem?

August 19, 2016
A question I get all too often on power integrity results is whether or not a current density issue is...
By Patrick Carrier
< 1 MIN READ
What to Look for in a PCB Analysis Solution

What to Look for in a PCB Analysis Solution

April 26, 2016
At today’s speeds, everything matters in PCB design and analysis tools that enable efficient modeling are key. From full-wave 3D...
By Patrick Carrier
< 1 MIN READ
Superior EMC Performance: Passing Class A with the Case Off

Superior EMC Performance: Passing Class A with the Case Off

August 6, 2015
This is the final post in a three-part series discussing PCB design EMI Reduction. View the first and second. Early in my...
By Patrick Carrier
< 1 MIN READ
Feeling suppressed? Hopefully your radiated emissions are.

Feeling suppressed? Hopefully your radiated emissions are.

July 28, 2015
This is the second in a three-part series discussing PCB design EMI reduction. In my previous blog post, I discussed different...
By Patrick Carrier
< 1 MIN READ
Contain the EMI Beast

Contain the EMI Beast

July 20, 2015
This is the first in a three-part series discussing PCB design EMI reduction. How can you tell if a fence...
By Patrick Carrier
< 1 MIN READ
Length matching for 10GHz links

Length matching for 10GHz links

November 12, 2014
For most busses, length-matching a group of signals to 5 mils is a bit of overkill.  But, if length-matching to...
By Patrick Carrier
< 1 MIN READ
DO sweat the small stuff

DO sweat the small stuff

November 6, 2014
My grandma always told me not to sweat the small stuff, and since she just celebrated her 100th birthday, I...
By Patrick Carrier
< 1 MIN READ
Hitting 100 ohms, the right way

Hitting 100 ohms, the right way

November 5, 2014
When designing the trace configuration for your differential pairs, you are typically targeting 100 ohms differential.  That means each trace...
By Patrick Carrier
< 1 MIN READ
The Future of Integrity

The Future of Integrity

September 9, 2014
I have recently been blogging about signal and power integrity, how the two are related, and how they can cross...
By Patrick Carrier
< 1 MIN READ
An Integrity Cocktail – Mixing SI and PI

An Integrity Cocktail – Mixing SI and PI

September 8, 2014
There are a lot of reasons to mix SI and PI analysis – trying to figure out a worst-case stimuli...
By Patrick Carrier
< 1 MIN READ
SI and PI – two flavors of Integrity

SI and PI – two flavors of Integrity

September 3, 2014
Power integrity (PI) is an analysis discipline that has been around for years.  Signal integrity (SI) has been around for a...
By Patrick Carrier
< 1 MIN READ
Back side cap mounting

Back side cap mounting

July 28, 2014
Earlier this year I wrote an article on maximizing capacitor effectiveness.  I have since received a number of inquiries on...
By Patrick Carrier
< 1 MIN READ
Does trace width matter much?

Does trace width matter much?

May 5, 2014
I guess that all depends on what you are talking about… for Signal Integrity, trace width is very important, as...
By Patrick Carrier
< 1 MIN READ
How to connect a capacitor?

How to connect a capacitor?

January 13, 2014
Capacitors are the backbone of a board power distribution network, or PDN.  However, just as important as having the capacitors...
By Patrick Carrier
< 1 MIN READ
What capacitor values do I use?

What capacitor values do I use?

January 9, 2014
A common question when designing a PDN (power distribution network) for a printed circuit board is which capacitor values to...
By Patrick Carrier
< 1 MIN READ
Which do I choose – simulation or measurement?

Which do I choose – simulation or measurement?

July 3, 2013
When designing a PCB, part of the design process is making sure the PCB works correctly.  At the very least,...
By Patrick Carrier
< 1 MIN READ
Correlating simulation and measurement

Correlating simulation and measurement

June 28, 2013
We go through great pains to ensure that our analysis tools give highly accurate answers in the most efficient manner...
By Patrick Carrier
< 1 MIN READ
Simulation and measurement

Simulation and measurement

June 26, 2013
A few months ago my colleague Chuck Ferry posted a blog about a correlation study he did for DesignCon, where...
By Patrick Carrier
< 1 MIN READ
How much stitching do I need?

How much stitching do I need?

January 9, 2013
If signal integrity engineers had the power to make their jobs as easy as possible, every signal in an electronic...
By Patrick Carrier
< 1 MIN READ
Pick a layer and stick with it

Pick a layer and stick with it

January 7, 2013
One of the nice things about newer, faster busses like DDR3 and DDR4 is on-die termination.  They are nice because...
By Patrick Carrier
< 1 MIN READ
Manage reference plane changes for quiet boards

Manage reference plane changes for quiet boards

January 4, 2013
In the past I have blogged about crossing splits in reference planes.  This is probably the most glaringly obvious of reference...
By Patrick Carrier
< 1 MIN READ
Return current on a stripline

Return current on a stripline

October 10, 2012
In previous blogs, I have discussed the importance of an uninterrupted, intact reference plane for signals.  But, what if you...
By Patrick Carrier
< 1 MIN READ
Is it ever okay to cross a plane split?

Is it ever okay to cross a plane split?

October 9, 2012
NO. Okay, well, I guess you could say “it depends”, but in general, no, it is not okay to cross...
By Patrick Carrier
< 1 MIN READ
EMI problems are easier to fix than you might think

EMI problems are easier to fix than you might think

October 8, 2012
Many electromagnetic interference (EMI) problems on PCBs happen when antennas are unintentionally created on the board.  How can this be...
By Patrick Carrier
< 1 MIN READ
Got integrity?

Got integrity?

June 13, 2012
Well, of course you do – most engineers are pretty good people.  Actually, as much as I’d like to brag...
By Patrick Carrier
< 1 MIN READ
Impedance

Impedance

June 12, 2012
Impedance is an important concept in many different realms of engineering. We often see it in our everyday life, especially...
By Patrick Carrier
< 1 MIN READ
What to analyze?

What to analyze?

June 11, 2012
In my previous blog, I talked about how a printed circuit board is nothing more than a path for signals...
By Patrick Carrier
< 1 MIN READ
Don’t let your board heat up your ICs

Don’t let your board heat up your ICs

June 6, 2012
What?  Isn’t that backwards?  Technically, yes.  The board is merely a pathway through which ICs talk to each other, and...
By Patrick Carrier
< 1 MIN READ
Put your charts away

Put your charts away

June 5, 2012
For over 50 years, designers have been calculating current-carrying capacity on PCBs using charts created by the Navy in 1956...
By Patrick Carrier
< 1 MIN READ
Co-simulation gets you the real answer

Co-simulation gets you the real answer

June 4, 2012
Simulation is a way of predicting reality.  The more information we put into the simulation, the better our prediction of...
By Patrick Carrier
< 1 MIN READ
Turn off your phone!

Turn off your phone!

May 3, 2012
Everybody knows you are supposed to turn off your phone and other electronic devices when you are on a plane.  You...
By Patrick Carrier
< 1 MIN READ
Is it SSN or is it Crosstalk?

Is it SSN or is it Crosstalk?

May 2, 2012
In the lab, both simultaneous switching noise (SSN) and crosstalk look the same.  They appear as unwanted pulses of energy...
By Patrick Carrier
< 1 MIN READ
Crosstalk is everywhere

Crosstalk is everywhere

May 1, 2012
Crosstalk is everywhere.  Really, in a more general sense, noise coupling is everywhere.  Usually the method of noise coupling is...
By Patrick Carrier
< 1 MIN READ
The cure for sick waveforms

The cure for sick waveforms

April 3, 2012
Found a signal integrity problem in the lab?  How do you go about fixing it?  Well, if it’s a SERDES...
By Patrick Carrier
< 1 MIN READ
Running at 6GHz with your eyes closed can be scary

Running at 6GHz with your eyes closed can be scary

March 31, 2012
Running at 6GHz is actually kind of scary regardless, but especially so with your eyes closed.  And I mean that...
By Patrick Carrier
< 1 MIN READ
It’s never too late

It’s never too late

March 29, 2012
It’s never too late to fix a design problem.  Well, maybe if the product is shipping, that might be classified...
By Patrick Carrier
< 1 MIN READ
The Parallel Pain

The Parallel Pain

March 7, 2012
Parallel busses are a pain to implement.  They really are.  Sure, they are slower than blazing-fast SERDES busses, but they...
By Patrick Carrier
< 1 MIN READ
Put the Pieces in Place for SERDES Success

Put the Pieces in Place for SERDES Success

March 6, 2012
Interconnect loss modeling?  Check.  Signal conditioning modeling?  Check.  Ability to simulate multiple S-parameter models for things like connectors and packages...
By Patrick Carrier
< 1 MIN READ
Know your limits

Know your limits

March 5, 2012
“A man’s got to know his limitations” … true, and so does a digital bus.  Clint Eastwood’s quote to conclude...
By Patrick Carrier
< 1 MIN READ
Shorter stubs are getting longer

Shorter stubs are getting longer

November 4, 2011
…It all depends on how fast you are trying to go.  That’s really the name of the game with anything...
By Patrick Carrier
< 1 MIN READ
Stupid vias… {grumble grumble}

Stupid vias… {grumble grumble}

November 3, 2011
Yeah, I can totally see Homer Simpson designing his SERDES bus and getting frustrated by all the additional insertion loss...
By Patrick Carrier
< 1 MIN READ
Via modeling – what do I really need?

Via modeling – what do I really need?

November 3, 2011
The whole via simulation issue is admittedly complicated, and I think really boils down to whether the vias are single-ended...
By Patrick Carrier
< 1 MIN READ
Measurement correlation is just a stackup away

Measurement correlation is just a stackup away

August 4, 2011
Whether you are trying to correlate simulated waveforms to measured waveforms for a DDR3 signal, or board timing numbers for...
By Patrick Carrier
< 1 MIN READ
Your traces aren’t square, but do you need to care?

Your traces aren’t square, but do you need to care?

August 3, 2011
Yes, you should care about the fact that PCB traces, when actually manufactured, end up having more of a trapezoidal...
By Patrick Carrier
< 1 MIN READ
Can you make Z higher?

Can you make Z higher?

August 2, 2011
Simulations should match measurements.  Otherwise, what good are they?  When doing signal integrity simulations, that starts with comprehensive stackup modeling. ...
By Patrick Carrier
< 1 MIN READ
Try to fit some plane pairs in your stackup

Try to fit some plane pairs in your stackup

May 26, 2011
At the very minimum, a good board stackup has solid reference planes for signal routing.  Power demands now pretty much...
By Patrick Carrier
< 1 MIN READ
High impedance drives your stackup geometries

High impedance drives your stackup geometries

May 24, 2011
Anyone that’s ever tried to put 75-ohm video onto a PCB stackup knows how high impedance will drive layer thicknesses. ...
By Patrick Carrier
< 1 MIN READ
Stackups: More than just a bunch of routing layers

Stackups: More than just a bunch of routing layers

May 23, 2011
Proper stackup design is the key to ensuring maximum performance for your PCB design.  Electromagnetic compatibility, signal integrity, power integrity...
By Patrick Carrier
< 1 MIN READ
The length of your terminator doesn’t matter

The length of your terminator doesn’t matter

January 28, 2011
Many designers go to great lengths to make sure they do appropriate length-matching, even to the level of including the...
By Patrick Carrier
< 1 MIN READ
Vias are longer than their length

Vias are longer than their length

January 27, 2011
Yeah, that’s what I said.  Vias are longer than their length.  Phrased more appropriately, the delay introduced by a via has...
By Patrick Carrier
< 1 MIN READ
How do you manage your trace lengths?

How do you manage your trace lengths?

January 25, 2011
Too often I see people just using straight length to manage their board timing.  Or take it one step further...
By Patrick Carrier
< 1 MIN READ
S-parameters are for more than just packages

S-parameters are for more than just packages

January 14, 2011
In the digital design world, we have typically only seen S-parameters used to model packages.  They are a popular output...
By Patrick Carrier
< 1 MIN READ
Making SERDES sims faster with IBIS-AMI

Making SERDES sims faster with IBIS-AMI

January 13, 2011
You may have heard lately about IBIS-AMI models, which are being used more often for SERDES simulation.  IBIS-AMI stands for I/O...
By Patrick Carrier
< 1 MIN READ
Tired of waiting for your SPICE to finish?

Tired of waiting for your SPICE to finish?

January 12, 2011
Anyone who has ever had to simulate a SERDES interface knows how long it take to run a couple hundred...
By Patrick Carrier
< 1 MIN READ