When designing the trace configuration for your differential pairs, you are typically targeting 100 ohms differential. That means each trace would be a 50-ohm trace, if there were no coupling between the traces. But, you usually want some decent coupling between the traces, so a good single-ended impedance target for each trace is between 60 and 75 ohms. That means that the differential pairs will have the highest-impedance traces on a given layer. That also means they will have the narrowest trace width. Typically that trace width will be 4 or 5 mils, to maximize routing density while maintaining a reasonable design cost. However, differential pairs are typically running very fast, in the GHz range, so a very narrow trace width can limit the length of the pair to just a few inches. By using wider traces, the copper losses can be reduced, allowing the differential pair to be routed over a longer distance. However, wider traces also mean thicker dielectrics to maintain a 100-ohm differential impedance, and thicker dielectrics mean more spacing from other signals is required to minimize crosstalk. So, basically, loss and routing density are at odds. This can be offset somewhat by using a lower-loss dielectric, but the cost of doing so might be more than just adding additional layers to make up for the loss of routing density. This is where high-speed analysis and simulation can be of great benefit in allowing you to make the right design tradeoffs.
I discuss this and other issues of working with high-speed differential pairs in my article “Ten Steps to Ten Gigahertz“, in Printed Circuit Design and Manufacture magazine.