At today’s speeds, everything matters in PCB design and analysis tools that enable efficient modeling are key. From full-wave 3D electromagnetic solvers to electrically aware PCB checking tools, I recommend a solution that offers comprehensive analysis of any type of bus.
DDR3 and DDR4 designs, for instance, are becoming very common. They employ a number of interface-specific mechanisms for maintaining performance, such as write-leveling and data bus inversion or DBI. Validating these interfaces requires consideration of on-chip timing, slew-rate derating to accurately characterize the on-board timing, and even taking into account the effects of the power distribution network on timing and signal quality.
High-speed serial or SERDES interfaces are pushing the limits of PCB performance. In order to properly characterize these signals at higher frequencies, advanced 3D solvers must be used to model pieces of the interconnect like vias, connectors, and chip breakouts. Combining those models with S-parameter models and trace models properly is essential to accurately characterizing the channel. And, new methods have emerged to simulate the channel and predict its performance down to very low BER (bit error rate) levels.
At this year’s PCB Forums, presenters will demonstrate all of the great technology in HyperLynx and how it applies to your PCB designs. Whether you’re an advanced designer or newer and still learning, and regardless of what solutions you currently utilize, PCB Forums has sessions for you. Find a location near you and reserve your seat today!
In the meantime, here are a couple of product demos of the SERDES simulation capabilities in HyperLynx:
- Simulating Multigigabit Serial Links with 2D and 3D Models
- Accelerating Multigigabit Serial Link Simulation with 3D Area Pattern Matching
Also, there are many more demos, webinars, and whitepapers available at mentor.com.