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Siemens acquires Canopus AI: Supercharging semiconductor manufacturing with AI-powered metrology

February 4, 2026

Siemens acquires Canopus AI to advance semiconductor manufacturing with AI-powered metrology and inspection, boosting precision, efficiency, and yield.

By Calibre IC Design & Manufacturing
4 MIN READ

Calibre IC Manufacturing in 2025: The year’s biggest news

January 29, 2026

Read about 2025 highlights from Siemens Calibre IC Manufacturing group, including advances in computational metrology, monotonic machine learning, AI, EUV and GPU acceleration

By Calibre IC Design & Manufacturing
4 MIN READ

ESD verification in 3D ICs: Navigating unseen risks and new realities

January 21, 2026

Discover best practices for automated 3D IC ESD verification using Calibre 3DPERC. Learn how to address the unique challenges of ESD protection in advanced 3D IC designs and ensure system-level reliability.

By Calibre IC Design & Manufacturing
5 MIN READ

Calibre IC Design in 2025: AI, 3D IC advancement and shift-left strategies drive verification excellence

January 12, 2026

Read about 2025 IC Design highlights from Siemens Calibre, including AI-powered verification and debug, 3D IC innovations, and shift-left strategies supporting accelerated tapeouts.

By Calibre IC Design & Manufacturing
4 MIN READ

Securing your silicon: Why automated IP integrity is non-negotiable in modern SoC design

December 2, 2025

Ensure IP integrity in your SoC designs. Discover how Calibre IP Checker detects hidden IP modifications, prevents costly re-spins and accelerates tape-out.

By Calibre IC Design & Manufacturing
5 MIN READ

6 frequent design rule checking errors every IC designer should know – and how Calibre nmDRC helps you avoid them

November 18, 2025

Learn about some common design rule checking (DRC) violations in integrated circuit layouts—and how Calibre nmDRC helps engineers catch, analyze and resolve them quickly to ensure first-pass silicon success.

By Calibre IC Design & Manufacturing
6 MIN READ

From translator to powerhouse: Calibre V2LVS second generation redefines LVS verification

October 16, 2025

Explore second-generation Calibre Verilog-to-LVS: up to 4X faster runtimes, 92% less memory use, smarter debugging and robust SoC verification for advanced digital designs

By Calibre IC Design & Manufacturing
7 MIN READ

Design rule checking in today’s integrated circuit design environment

October 6, 2025

Explore integrated circuit design rule checking (DRC) in modern integrated circuit design, from increasing complexity to fast-feedback solutions like Calibre nmDRC Recon. Learn use cases, challenges and future trends.

By Calibre IC Design & Manufacturing
9 MIN READ

Boost simulation results with powerful selective net extraction with Calibre xACT

October 1, 2025

By Karen Chow In advanced integrated circuit (IC) design, post-layout parasitic extraction is crucial for accurate performance analysis and optimization….

By Calibre IC Design & Manufacturing
9 MIN READ