Ready for a Verification Extravaganza in the Land of Verification Engineers?

Ready for a Verification Extravaganza in the Land of Verification Engineers?

I have always been wanting to contribute to the growing verification engineering community in India, which Mentor’s CEO Wally Rhines…

UVM: The Next IEEE Standard (1800.2)

UVM: The Next IEEE Standard (1800.2)

Accellera Handoffs UVM to IEEE It has been a long path from Mentor’s AVM to IEEE P1800.2.  But the moment…

Verification Horizons: The DAC 2015 Issue

Verification Horizons: The DAC 2015 Issue

If you were not one of the 100’s of visitors to the Verification Academy booth at DAC 2015 and missed…

Part 10: The 2014 Wilson Research Group Functional Verification Study

Part 10: The 2014 Wilson Research Group Functional Verification Study

ASIC/IC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2014…

Part 6: The 2014 Wilson Research Group Functional Verification Study

Part 6: The 2014 Wilson Research Group Functional Verification Study

FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2014 Wilson…

UVM Debug. A contest using class based testbench debug…

UVM Debug. A contest using class based testbench debug…

Still having fun doing UVM and Class based debug? Maybe a debug contest will help. I had a contest with…

No to Know VIP

No to Know VIP

In a recent post on deepchip.com John Cooley wrote about “Who Knew VIP?”. In addition, Mark Olen wrote about this…

March 2015 Edition of Verification Horizons Available Online!

March 2015 Edition of Verification Horizons Available Online!

With a name like “Fitzpatrick,” you knew I’d be celebrating today, right? Well, there’s no better way to celebrate this…

Portable Stimulus: A Small Step in Standardization

Portable Stimulus: A Small Step in Standardization

Accellera Approves Creation of Portable Stimulus Working Group At DVCon 2014, Mentor Graphics proposed Accellera launch an exploratory exercise, called…