The IEEE-SA has a policy of keeping standards active by making sure they get a cycle of updates every 10…
The latest revision to the SystemVerilog standard, IEEE 1800™-2017 was approved at the December 2017 IEEE Standards Association meeting series. …
No one ever said that functional verification was easy. In fact, from a computer science theoretical perspective verification is considered…
There’s a wonderful quote in Brian Kernighan book The Elements of Programming Style, where he says “Everyone knows that debugging…
My last blog post was written a few years ago before attending a conference when I was reminiscing about the…
Face facts: power supply nets are now effectively functional nets, but they are typically not defined in the design’s RTL….
ASIC/IC Language and Library Adoption Trends This blog is a continuation of a series of blogs related to the 2016…
FPGA Language and Library Trends This blog is a continuation of a series of blogs related to the 2016 Wilson…
This is the first in a series of blogs that presents the findings from our new 2016 Wilson Research Group…
