Mentor Enterprise Verification Platform Debuts

Mentor Enterprise Verification Platform Debuts

Its always fun to take the wraps off of solutions we have been hard at work developing.  The global team…

DVCon 2014: Standards on Display

DVCon 2014: Standards on Display

One of the nice things about DVCon is the update one can get from the developers of IEEE and Accellera…

Managing Verification Coverage Information

Managing Verification Coverage Information

The UCIS Story There is no secret as design sizes grow it is doubly burdensome for verification.  Two factors that…

IEEE Standards Association Symposium on EDA Interoperability

IEEE Standards Association Symposium on EDA Interoperability

Low Power Flow Kicks-off Symposium In the world of electronic design automation, as an idea takes hold and works its…

Part 8: The 2012 Wilson Research Group Functional Verification Study

Part 8: The 2012 Wilson Research Group Functional Verification Study

Language and Library Trends This blog is a continuation of a series of blogs that present the highlights from the…

A Short Class on SystemVerilog Classes

A Short Class on SystemVerilog Classes

It is often said that the English language is one of the most difficult languages to learn: inconsistent spelling rules;…

Part 3: The 2012 Wilson Research Group Functional Verification Study

Part 3: The 2012 Wilson Research Group Functional Verification Study

Clocking and Power Trends In Part 2 of this series of blogs, I continued the discussion focused on design trends…

IEEE 1801™-2013 UPF Standard Is Published

IEEE 1801™-2013 UPF Standard Is Published

Download the standard now – at no charge The IEEE Standards Association (IEEE-SA) has published the latest UPF 2.1 standard,…

Getting AMP’ed Up on the IEEE Low-Power Standard

Getting AMP’ed Up on the IEEE Low-Power Standard

Power Aware Verification Course Modules Released I guess I could continue the puns on the low-power theme as a few…