Accellera Approves New Co-Emulation Standard

Accellera Approves New Co-Emulation Standard

Standard Co-Emulation Modeling Interface (SCE-MI) 2.1 Improves Verification Productivity The Accellera Interface Technical Subcommittee (ITC) completed version 2.1 of the…

Towards UVM Register Package Interoperability

Towards UVM Register Package Interoperability

23rd Synopsys EDA Interoperability Forum Features a Verification Session with focus on the UVM Register Package As readers of the…

UVM: Joint Statement Issued by Mentor, Cadence & Synopsys

UVM: Joint Statement Issued by Mentor, Cadence & Synopsys

DAC Attendees Invited to Accellera’s Breakfast sponsored by Mentor, Cadence & Synopsys The full statement can be read at EDA…

OVM/UVM at DAC 2010

OVM/UVM at DAC 2010

Visit Booth 1350 – The hub of OVM/UVM Activity at DAC The OVM World booth at the Design Automation Conference…

Accellera’s DAC Breakfast & Panel Discussion

Accellera’s DAC Breakfast & Panel Discussion

UVM: Charting the New Territory At this year’s DAC, Accellera introduces UVM (Universal Verification Methodology) to the world at its…

North American SystemC User Group (NASCUG) Meeting at DAC

North American SystemC User Group (NASCUG) Meeting at DAC

You Are Invited – Register Now! (seating is limited) Sunday, June 13 2:30pm – 6:00pm Anaheim Hilton, California Ballroom A…

OVM Extensions for Testbench Reuse

OVM Extensions for Testbench Reuse

Download OVM Configuration and Virtual Interface Extensions from OVMWorld.org Creating configurable testbench elements is critical for reuse. If you write…

SystemC Day Videos from DVCon Available Now

SystemC Day Videos from DVCon Available Now

Noted EDA analyst and guru Gary Smith delivered keynote address: “ESL: Where We Are and Where We’re Going” OSCI sponsored…