Exciting Times Ahead: DVCon Taiwan and RISC-V Taipei Day 2024

For the electronic system design community in Taiwan, you have two pivotal events in the world of design verification and…

Decoding LLM Hallucinations: Insights and Taming them for EDA Applications

What are Large Language Model’s hallucinations. LLMs will be powerful EDA productivity tool once we know what caused it and how to deal with their adverse effects.

ML for Verification

Big Data for Verification – Inspiration from Large Language Models

The importance of verification data learned from training Large Language Models. In DVCon will share an overview of ML applications in verification and . present VIQ tutorial on how data can empower verification, with demos of existing ML applications.

ML for Verification

Unleashing the Power of Verification Data with Machine Learning

Importance of data in verification can never be underestimated, start building data assets and unlock the value with Machine Learning.

Cats != Coverage

Cats != Coverage

“Any sufficiently advanced technology is indistinguishable from magic.” – Arthur C. Clarke, Profiles of The Future “We actually made a…

A glimpse into the journey of DVCon India 2017

A glimpse into the journey of DVCon India 2017

Time sure does fly, DVCon India 2017 is just around the corner, but I feel like DVCon India 2016 just…