A glimpse into the journey of DVCon India 2017

Time sure does fly, DVCon India 2017 is just around the corner, but I feel…

Verification Horizons: The DAC 2015 Issue

If you were not one of the 100’s of visitors to the Verification Academy booth…

Preparing for the Perfect Storm with New-School Verification Techniques

Between 2006 and 2014, the average number of IPs integrated into an advanced SoC increased…

Happy Halloween from ARM TechCon

MENTOR GRAPHICS AT ARM TECHCON This week ARM® TechCon® 2013 is being held at the…

Walking in the Desert or Drinking from a Fire Hose?

You don’t need a graphic like the one below to know that multi-core SoC designs are…

Intelligent Testbench Automation – Catching on Fast

Graph-Based Intelligent Testbench Automation While intelligent testbench automation is still reasonably new when measured in…

Tornado Alert!!!

Is my car trying to tell me something? This past Friday was the beginning of…

Combining Intelligent Testbench Automation with Constrained Random Testing

Who Doesn’t Like Faster? In my last blog post I introduced new technology called Intelligent…

Intelligent Testbench Automation Delivers 10X to 100X Faster Functional Verification

iTBA Introduction If you’ve been to DAC or DVCon during the past couple of years,…