OVM Bridges SystemVerilog and SystemC Languages When UVM Connect was first released, the multilingual connection between IEEE Std. 1800™ (SystemVerilog)…
Five Leading Global Organizations Affirm “The Modern Paradigm for Standards” The EDA industry has seen changes to the international standards…
At the 2012 Design Automation Conference, I had the pleasure of moderating a panel at a workshop titled “Post-Silicon Debug:…
A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According…
Live & In-Person at DAC 2012! Verification Academy, the brain child of Harry Foster, Chief Verification Scientist at Mentor Graphics,…
Open-Source Proof-of-Concept Library Released Accellera Systems Initiative has released for general industry use an open-source proof-of-concept library as a companion…
Accellera Ushers in Unified Coverage Interoperability Standard (UCIS) For the past few months, Accellera’s Unified Coverage Interoperability Standards working group…
Hi Everyone, Just wanted to make sure you’re aware of our next Recipe of the Month online Web Seminar: Scoreboards…
Graph-Based Intelligent Testbench Automation While intelligent testbench automation is still reasonably new when measured in EDA years, this graph-based verification…
