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Check out the October, 2012 Verification Horizons

Check out the October, 2012 Verification Horizons

Hi Everyone, Just wanted to let you know that the latest and greatest edition of Verification Horizons is now available….

Improving simulation results with formal-based technology

Improving simulation results with formal-based technology

When it comes to formal methods, many engineers are skeptics. Perhaps this is due to value propositions that have been…

Introducing “Verification Academy 2.0”

Introducing “Verification Academy 2.0”

A new style takes center stage It was Fashion Week in Portland, Oregon in early October.  And while the thought…

OVM Gets Connected

OVM Gets Connected

OVM Bridges SystemVerilog and SystemC Languages When UVM Connect was first released, the multilingual connection between IEEE Std. 1800™ (SystemVerilog)…

OpenStand & EDA Standardization

OpenStand & EDA Standardization

Five Leading Global Organizations Affirm “The Modern Paradigm for Standards” The EDA industry has seen changes to the international standards…

Synthesizing Hardware Assertions and Post-Silicon Debug

Synthesizing Hardware Assertions and Post-Silicon Debug

At the 2012 Design Automation Conference, I had the pleasure of moderating a panel at a workshop titled “Post-Silicon Debug:…

Virtual Emulation for Debugging

Virtual Emulation for Debugging

A system-level verification engineer once told me that his company consumes over 50% of its emulation capacity debugging failures. According…

Verification Academy: Up Close & Personal

Verification Academy: Up Close & Personal

Live & In-Person at DAC 2012! Verification Academy, the brain child of Harry Foster, Chief Verification Scientist at Mentor Graphics,…

SystemC Standardization Cycle Completes

SystemC Standardization Cycle Completes

Open-Source Proof-of-Concept Library Released Accellera Systems Initiative has released for general industry use an open-source proof-of-concept library as a companion…