Tessent at ISTFA 2022

Join Tessent at the 48th International Symposium for Testing and Failure Analysis, the premier event for the microelectronics failure analysis community.

Efficient and effective DFT for 3D stacked die

Yes, there is a path to a scalable, affordable, and comprehensive DFT solution for 3D ICs.

Chip data joins the party with Tessent Host Services software

Siemens’ Tessent Embedded Analytics IP and software, Host Services software opens the lines of communication with your chip and brings SLS one step closer to reality.

Typical allocation of functional safety within an automotive SoC.

Webinar: Meet the Challenges of ISO 26262 with Tessent Test Solutions

Register Now! Tune in on June 9, 2022 at 11:00 am (pacific daylight time) to learn how to use Tessent…

Connected roads

Cybersecurity through hardware-based threat detection and mitigation

SoC design teams fill a mission-critical role in ensuring cyber-physical safety and security for electrical and electronic systems that are…

D&R IP-SoC Day 2022 Silicon Valley

Siemens EDA talks cybersecurity at IP-SoC Silicon Valley

The Tessent group participated in the “unique event fully dedicated to IP and IP-based electronic systems,” D&R IP-SoC Silicon Valley…

Automated shared bus interface memory test

Webinar: Memory test using a shared bus Interface

The explosive growth in the use of memory content on SoCs calls for a new solution to effectively access the…

Webinar: Smarter DFT architecture for advanced SoCs

Leonardo DaVinci said that “Simplicity is the ultimate sophistication.” Semiconductor design is a very complex process, and every step of…

For secure chips, use high-quality test and embedded analytics

There is growing concern over the security of ICs used not just in aerospace and military devices, but also in…