Enhance safety with Tessent

Enhance safety with Tessent

Learn how to ensure safety for automotive ICs with Tessent solutions from Siemens EDA.

The age of AI comes to IC test automation

Learn how artificial intelligence (AI) is advancing IC test and yield analysis.

Video: Leveraging the RISC-V efficient trace (E-Trace) standard

Learn more about using the RISC-V efficient trace standard for non-intrusive, full-speed and system-level visibility.

Three ways to slash AI chip TTM with advanced DFT and silicon bring-up

Advanced EDA technology eases AI chip development.

Picture of James Pickford at the Elektra awards banquet.

Awarding excellence: Siemens’ James Pickford wins BrightSparks award

Siemens’ James Pickford wins BrightSparks award.

RISC-V | Solving bus and software deadlock problems in complex SoCs

Tessent Embedded Analytics offers an integrated range of hardware and software tools that accelerate debug of RISC-V based SoCs.

Caucasian driver reading magazine in autonomous car. Self driving vehicle. Driverless car.

Designing automotive ICs for cybersecurity

The day has already arrived when we need to be concerned about the cybersecurity of our cars. A multi-layers approach to secure semiconductors builds security in from the start.

Wireframe image of a futuristic car

Security by design: a discussion on automotive cybersecurity with Siraj Shaikh

Host Lee Harrison and his guest Siraj Shaikh discuss whether we will ever see self-driving vehicles, the current state of cybersecurity for vehicles, and how do compliance and regulations fit into the big picture?

Debugging RISC-V processors using E-Trace

Tessent Embedded Analytics offers an integrated range of hardware and software tools that accelerate debug of RISC-V based SoCs.