Abstract visual showing Interconnected data

Data, data, everywhere: Where did it come from, who owns it and is it the right version?

Knowing what is in your IC package design, where it came from, and who touched it last and when, is key to being able to verify with complete certainty and traceability your design’s current status. 

Screen shot of the Innovator3D IC canvas

The smart path to STCO with Hierarchical Device Planning (HDP)

Siemens partnered with Intel Foundry to develop a STCO centric capability that enables a “smart path” to homogeneous disaggregation using Hierarchical Device Planning and parameterized pin regions.

Co-packaged optics chip

Five Key Trends of Co-Packaged Optics (CPO) in 2026

For years, data-center performance scaled by following a familiar playbook: faster GPUs, higher SerDes rates, and increasingly aggressive board designs….

Six IC packaging trends

Six Key Trends Redefining 3D IC Packaging in the AI Era

Some say we are officially in the Post-Moore’s Law world.  Moore himself closed his seminal paper by mentioning the “day…

Screenshot of Innovator3D IC

Verifying your 2.5/3D IC device assembly level netlist

In this blog we will introduce a new way to verify your 2.5/3D IC device assembly level netlist using formal verification that can exhaustively verify all interconnections between the chiplet blocks.

Abstract image of a chip. Text that says "What is 3Dblox?"

What is 3Dblox?

If you have not heard of it before, 3Dblox is an emerging standard that was first created by TSMC but is now managed by IEEE.

3D IC thermal challenges and trends 2026

Key Thermal Advances Driving Next-Gen AI Chip Design in 2026

AI is hot — literally.  As we bid farewell to a transformative year of 2025, there’s no doubt that the AI chip underwent substantial changes. As AI compute is pushing…

what's new Innovator3D IC 2510

What’s New in Innovator3D IC solution suite release 2510

Innovator3D IC solution suite release 2510 marks a groundbreaking first release of the comprehensive Innovator3D IC solution suite.

10 steps for successful heterogeneous chiplet integration

Unlock advanced chiplet design success: Discover the Siemens EDA Heterogeneous Integration eBook series

The future of semiconductor innovation is rapidly shifting from monolithic chips to advanced, multi-chiplet architectures. As devices demand greater power,…