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User2User 2024: Silicon photonics to integrate chiplets: Swissbit

September 17, 2024

Swissbit is pioneering chiplet and system-on-package solutions that embed security and functional safety from the design phase to meet stringent requirements in harsh industrial and automotive environments.

By John McMillan
3 MIN READ
User2User 2024: Chiplets for future automotive application: Fraunhofer

User2User 2024: Chiplets for future automotive application: Fraunhofer

September 11, 2024

Andy Heinig, Head of Department Efficient Electronics at Fraunhofer, explains why automotive is especially a good market and enabler for chiplets and presents different use cases for chiplets that are on the horizon.

By John McMillan
3 MIN READ

Why is a comprehensive workflow essential for chiplet design and today’s 3D IC architectures?

August 8, 2024

Explore this infographic to learn why a comprehensive workflow essential for chiplet design and today’s 3D IC architectures.

By John McMillan
2 MIN READ

The multi-physics challenge: Known good die may not behave in 3D IC as stand alone!

August 5, 2024

Discover how Siemens’ EDA tackles the multi-physics challenge to achieve fast, accurate assembly-level physical verification.

By John McMillan
2 MIN READ

Discover how AI is changing the nature of semiconductor design

July 16, 2024

AI is shaping the semiconductor industry’s future and its alignment with Siemens’ commitment to innovation and enhancing sustainability by accelerating…

By John McMillan
2 MIN READ

A deep dive into HDAP LVS/LVL verification

January 29, 2024

EDA companies are developing tools and workflows to support HDAP (High-density advanced packaging) LVS/LVL verification. Though the data for achieving “signoff-level” confidence is a work in progress, EDA companies are providing tools that can adapt to different levels of data availability and enable HDAP designers to execute HDAP LVS/LVL flows that are both productive and beneficial.

By John McMillan
4 MIN READ
Siemens 3D IC heterogeneous semiconductor packaging workflows catapult design teams into the future of IC design today.

Workflows for tackling heterogeneous integration of chiplets for 2.5D/3D semiconductor packaging

January 11, 2024

Workflows for tackling heterogeneous integration of chiplets for 2.5D/3D semiconductor packaging.

By John McMillan
4 MIN READ

Parasitic extraction technologies: Advanced node and 3D-IC design

January 2, 2024

Advanced nodes and 3D-IC packages require new and enhanced parasitic extraction processes that can resolve a variety of complex parasitic issues in these designs.

By John McMillan
3 MIN READ

Impacts of 3D IC on the future

December 20, 2023

3D IC technology development started many years ago well before the slowing down of Moore’s law benefits became a topic…

By John McMillan
3 MIN READ