Video - Semiconductor Packaging

User2User 2024: Pioneering semiconductor reliability automotive apps – imec’s Canary chip

November 5, 2024

In this User2User 2024 presentation, Dr. Thomas Kallstenius, representing imec, the world’s leading independent research institute specializing in nanoelectronics, whose Belgium-based…

By John McMillan

4 MIN READ

EE Times Fireside chat: Linking design to manufacturing for a sustainable semiconductor future

October 21, 2024

Listen in as Michael Munsey, VP at Siemens EDA, joins EE Times’ Sally Ward-Foxton for a Fireside chat Q&A session…

By John McMillan

2 MIN READ

User2User 2024: Customer-specific solutions with Siemens EDA tools: Sysberry GmbH

October 15, 2024

The presentation features consulting project examples from Sysberry GmbH that leverage Siemens EDA tools and APIs.

By John McMillan

3 MIN READ

User2User 2024: Meeting future performance demands through packaging: ChipletZ

September 27, 2024

Learn how 3DIC tech enhances compact, high-performance systems but faces verification challenges. We explore solutions and methodologies, including the use of Siemens XSI and Calibre 3DSTACK.

By John McMillan

4 MIN READ

User2User 2024: Chiplets for future automotive application: Fraunhofer

September 11, 2024

Andy Heinig, Head of Department Efficient Electronics at Fraunhofer, explains why automotive is especially a good market and enabler for chiplets and presents different use cases for chiplets that are on the horizon.

By John McMillan

3 MIN READ

User2User 2024: Advanced physical verification flows for 3D IC’s

June 25, 2024

In this User2User 2024 video presentation, now available on-demand, Microsoft’s Amit Kumar discusses 3D IC verification flows with a focus…

By John McMillan

3 MIN READ

Siemens 3D IC heterogeneous semiconductor packaging workflows catapult design teams into the future of IC design today.

Workflows for tackling heterogeneous integration of chiplets for 2.5D/3D semiconductor packaging

January 11, 2024

Workflows for tackling heterogeneous integration of chiplets for 2.5D/3D semiconductor packaging.

By John McMillan

4 MIN READ