Verilog - Verification Horizons

Learn more about DDA at DAC At DAC – Mentor Graphics and Cadence Design Systems are coming together to usher…

DVCon India, held in September 2014 in Bangalore, built on the Indian SystemC User Group meeting events and added a…

My Feb. 4 post introduced Mentor Graphics’ three-step FPGA verification process intended to help design teams get out of the…

Marketing teams at FPGA vendors have been busy as the silicon nanometer geometry race escalates. Altera is “delivering the unimaginable”…

Language and Library Trends This blog is a continuation of a series of blogs that present the highlights from the…

A unique concept most beginners have trouble grasping about the Verilog, and now the SystemVerilog, Hardware Description Language (HDL) is…

This is the first in a series of blogs that presents the results from the 2012 Wilson Research Group Functional…

How do your favorites rank? Have you ever wondered how popular the different IEEE standards for electronic design automation are?…

Language and Library Trends This blog is a continuation of a series of blogs, which present the highlights from the…