UVM - Verification Horizons

Introducing BUGGED OUT — A new bite-sized podcast for verification engineers

November 10, 2025

BUGGED OUT Podcast

By Harry Foster

2 MIN READ

The Grapes Are Back! And Cake! And C Tests with UVM and Transactions For All! Easy.

September 8, 2025

The grapes have returned – this weekend was “harvest” time. Jelly everywhere. A lot like this year here at Siemens….

By Rich Edelman

3 MIN READ

Siemens at DVCon India 2025: Driving the Future of Design and Verification

August 26, 2025

DVCon India 2025, taking place on September 10–11 at the Radisson Blu, Marathahalli, Bengaluru, will mark a special milestone—its 10th anniversary. Over the past decade, DVCon India has grown into one of the region’s most influential conferences for design and verification professionals. Siemens will be prominently featured across vision talks, technical papers, posters, and workshops, showcasing its leadership in AI-driven EDA, hardware-assisted verification, and formal methodologies.

By Dennis Brophy

2 MIN READ

Reminder: DVCon U.S. 2026 Call for Papers – Sept 7th Deadline Approaching!

August 25, 2025

The DVCon U.S. 2026 Call for Papers deadline is Sunday, September 7th at 11:59 PM. Don’t miss your chance to share your expertise…

By Dave Rich

< 1 MIN READ

Siemens EDA at FMS 2025 – Shaping the Future of Memory and Storage

July 31, 2025

We’re excited to connect with fellow innovators, engineers, and industry leaders at FMS 2025. Whether you’re attending our sessions or stopping by Booth #1140, we look forward to sharing the latest technical advancements in verification IP, system-level validation, and memory and interconnect technologies.

By Dennis Brophy

2 MIN READ

Closing the Gap in Software Skills for Verification Engineers

April 17, 2025

I’m excited to announce next month’s U2U (User-to-User) meeting, followed by a crucial technical training session that no hardware verification…

By Dave Rich

2 MIN READ

Got Coverage?

February 14, 2025

Welcome to 2025. What happened?! “Coverage” in August in Yosemite backpacking has a different meaning. In August? Snow? Lots of…

By Rich Edelman

3 MIN READ

DVCon 2025: A must for hardware design and verification engineers

February 12, 2025

I’ve attended every DVCon US conference since its inception, over 30 years ago. I’ve also given keynotes at DVCon India….

By Dave Rich

2 MIN READ

Update from the Standards World: Accellera Approves UVM-MS 1.0 Standard

February 10, 2025

Accellera Systems Initiative approved the Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 standard. This milestone marks a significant advancement in…

By Dennis Brophy

2 MIN READ